diff options
| author | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | 2014-09-17 09:39:35 +0400 |
|---|---|---|
| committer | Kumar Gala <galak@codeaurora.org> | 2014-09-18 02:24:14 +0400 |
| commit | 0be5fef161151b8841d3e3d33d815695384a9451 (patch) | |
| tree | e8f1cca9b1ad48b447e54c721cc57888777e734c /arch | |
| parent | bf7f6b0432871cb68f3e3f4961a33cc6be05bc75 (diff) | |
| download | linux-0be5fef161151b8841d3e3d33d815695384a9451.tar.xz | |
ARM: DT: apq8064: add support to sdcc4 for wlan.
This patch adds sdcc4 node to enable wlan support on IFC6410
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8064.dtsi | 38 |
2 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts index 90db8af51f3a..27c7dfeec186 100644 --- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts +++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts @@ -23,6 +23,10 @@ sdcc3: sdcc@12180000 { status = "okay"; }; + /* WLAN */ + sdcc4: sdcc@121c0000 { + status = "okay"; + }; }; }; }; diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index b1e476ac5edf..f31d20b3ceb4 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -85,6 +85,13 @@ pinctrl-names = "default"; pinctrl-0 = <&ps_hold>; + sdc4_gpios: sdc4-gpios { + pios { + pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"; + function = "sdc4"; + }; + }; + ps_hold: ps_hold { mux { pins = "gpio78"; @@ -226,6 +233,16 @@ qcom,ee = <0>; }; + sdcc4bam:dma@121c2000{ + compatible = "qcom,bam-v1.3.0"; + reg = <0x121c2000 0x8000>; + interrupts = <0 95 0>; + clocks = <&gcc SDC4_H_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + }; + amba { compatible = "arm,amba-bus"; #address-cells = <1>; @@ -268,6 +285,27 @@ dmas = <&sdcc3bam 2>, <&sdcc3bam 1>; dma-names = "tx", "rx"; }; + + sdcc4: sdcc@121c0000 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + status = "disabled"; + reg = <0x121c0000 0x2000>; + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <48000000>; + vmmc-supply = <&vsdcc_fixed>; + vqmmc-supply = <&vsdcc_fixed>; + dmas = <&sdcc4bam 2>, <&sdcc4bam 1>; + dma-names = "tx", "rx"; + pinctrl-names = "default"; + pinctrl-0 = <&sdc4_gpios>; + }; }; }; }; |