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author | Rahul Kundu <rahul.kundu@chelsio.com> | 2020-03-25 14:53:09 +0300 |
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committer | David S. Miller <davem@davemloft.net> | 2020-03-25 22:22:33 +0300 |
commit | 1f074e677a343afcd852af5ee725bacc937fa6bd (patch) | |
tree | f6c5e142505f5bb73228d6a9fdbae9492bb80858 /arch/x86/kernel/cpu/mce/therm_throt.c | |
parent | 6e22c60480aa849d9e6a3f74c6e6df343d87e88d (diff) | |
download | linux-1f074e677a343afcd852af5ee725bacc937fa6bd.tar.xz |
cxgb4: Add support to catch bits set in INT_CAUSE5
This commit adds support to catch any bits set in SGE_INT_CAUSE5 for Parity Errors.
F_ERR_T_RXCRC flag is used to ignore that particular bit as it is not considered as fatal.
So, we clear out the bit before looking for error.
This patch now read and report separately all three registers(Cause1, Cause2, Cause5).
Also, checks for errors if any.
Signed-off-by: Raju Rangoju <rajur@chelsio.com>
Signed-off-by: Rahul Kundu <rahul.kundu@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/x86/kernel/cpu/mce/therm_throt.c')
0 files changed, 0 insertions, 0 deletions