diff options
| author | Fenghua Yu <fenghua.yu@intel.com> | 2017-12-21 01:57:22 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-01-18 11:33:31 +0300 |
| commit | def10853930a82456ab862a3a8292a3a16c386e7 (patch) | |
| tree | 439170b06fc84cdb4656091b30a72b25d1d344d4 /arch/x86/kernel/cpu/intel_rdt.h | |
| parent | a511e7935378ef1f321456a90beae2a2632d3d83 (diff) | |
| download | linux-def10853930a82456ab862a3a8292a3a16c386e7.tar.xz | |
x86/intel_rdt: Add two new resources for L2 Code and Data Prioritization (CDP)
L2 data and L2 code are added as new resources in rdt_resources_all[]
and data in the resources are configured.
When L2 CDP is enabled, the schemata will have the two resources in
this format:
L2DATA:l2id0=xxxx;l2id1=xxxx;....
L2CODE:l2id0=xxxx;l2id1=xxxx;....
xxxx represent CBM (Cache Bit Mask) values in the schemata, similar to all
others (L2 CAT/L3 CAT/L3 CDP).
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: "Ravi V Shankar" <ravi.v.shankar@intel.com>
Cc: "Tony Luck" <tony.luck@intel.com>
Cc: Vikas" <vikas.shivappa@intel.com>
Cc: Sai Praneeth" <sai.praneeth.prakhya@intel.com>
Cc: Reinette" <reinette.chatre@intel.com>
Link: https://lkml.kernel.org/r/1513810644-78015-5-git-send-email-fenghua.yu@intel.com
Diffstat (limited to 'arch/x86/kernel/cpu/intel_rdt.h')
| -rw-r--r-- | arch/x86/kernel/cpu/intel_rdt.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/intel_rdt.h b/arch/x86/kernel/cpu/intel_rdt.h index 3397244984f5..19ffc5a7c116 100644 --- a/arch/x86/kernel/cpu/intel_rdt.h +++ b/arch/x86/kernel/cpu/intel_rdt.h @@ -357,6 +357,8 @@ enum { RDT_RESOURCE_L3DATA, RDT_RESOURCE_L3CODE, RDT_RESOURCE_L2, + RDT_RESOURCE_L2DATA, + RDT_RESOURCE_L2CODE, RDT_RESOURCE_MBA, /* Must be the last */ |