diff options
| author | Sebastian Andrzej Siewior <bigeasy@linutronix.de> | 2016-09-20 16:12:21 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2016-09-20 17:06:09 +0300 |
| commit | f1e1c9e5e357c05253affb13be29285c5cb56bf0 (patch) | |
| tree | 941b58db15a63e880950eb986590564e181f0217 /arch/x86/events/intel/bts.c | |
| parent | 3be7988674ab33565700a37b210f502563d932e6 (diff) | |
| download | linux-f1e1c9e5e357c05253affb13be29285c5cb56bf0.tar.xz | |
perf/x86/intel/bts: Make sure debug store is valid
Since commit 4d4c47412464 ("perf/x86/intel/bts: Fix BTS PMI detection")
my box goes boom on boot:
| .... node #0, CPUs: #1 #2 #3 #4 #5 #6 #7
| BUG: unable to handle kernel NULL pointer dereference at 0000000000000018
| IP: [<ffffffff8100c463>] intel_bts_interrupt+0x43/0x130
| Call Trace:
| <NMI> d [<ffffffff8100b341>] intel_pmu_handle_irq+0x51/0x4b0
| [<ffffffff81004d47>] perf_event_nmi_handler+0x27/0x40
This happens because the code introduced in this commit dereferences the
debug store pointer unconditionally. The debug store is not guaranteed to
be available, so a NULL pointer check as on other places is required.
Fixes: 4d4c47412464 ("perf/x86/intel/bts: Fix BTS PMI detection")
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Reviewed-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: vince@deater.net
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/20160920131220.xg5pbdjtznszuyzb@breakpoint.cc
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/events/intel/bts.c')
| -rw-r--r-- | arch/x86/events/intel/bts.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c index bdcd6510992c..6ff66efa0feb 100644 --- a/arch/x86/events/intel/bts.c +++ b/arch/x86/events/intel/bts.c @@ -455,7 +455,7 @@ int intel_bts_interrupt(void) * The only surefire way of knowing if this NMI is ours is by checking * the write ptr against the PMI threshold. */ - if (ds->bts_index >= ds->bts_interrupt_threshold) + if (ds && (ds->bts_index >= ds->bts_interrupt_threshold)) handled = 1; /* |