summaryrefslogtreecommitdiff
path: root/arch/tile/mm
diff options
context:
space:
mode:
authorChris Metcalf <cmetcalf@tilera.com>2011-02-28 23:48:39 +0300
committerChris Metcalf <cmetcalf@tilera.com>2011-03-02 00:21:06 +0300
commit63b7ca6b04427aea9075d6f5f5f15b82e115bce4 (patch)
tree97a72ec3d243a46475e880b2c5703a167165f961 /arch/tile/mm
parent3cebbafd28e6f91677f3becffcdf9150b74a4e0c (diff)
downloadlinux-63b7ca6b04427aea9075d6f5f5f15b82e115bce4.tar.xz
arch/tile: enhance existing finv_buffer_remote() routine
It now takes an additional argument so it can be used to flush-and-invalidate pages that are cached using hash-for-home as well those that are cached with coherence point on a single cpu. This allows it to be used more widely for changing the coherence point of arbitrary pages when necessary. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch/tile/mm')
-rw-r--r--arch/tile/mm/homecache.c36
1 files changed, 31 insertions, 5 deletions
diff --git a/arch/tile/mm/homecache.c b/arch/tile/mm/homecache.c
index d78df3a6ee15..f344f4fc7342 100644
--- a/arch/tile/mm/homecache.c
+++ b/arch/tile/mm/homecache.c
@@ -179,23 +179,46 @@ void flush_remote(unsigned long cache_pfn, unsigned long cache_control,
panic("Unsafe to continue.");
}
+void flush_remote_page(struct page *page, int order)
+{
+ int i, pages = (1 << order);
+ for (i = 0; i < pages; ++i, ++page) {
+ void *p = kmap_atomic(page);
+ int hfh = 0;
+ int home = page_home(page);
+#if CHIP_HAS_CBOX_HOME_MAP()
+ if (home == PAGE_HOME_HASH)
+ hfh = 1;
+ else
+#endif
+ BUG_ON(home < 0 || home >= NR_CPUS);
+ finv_buffer_remote(p, PAGE_SIZE, hfh);
+ kunmap_atomic(p);
+ }
+}
+
void homecache_evict(const struct cpumask *mask)
{
flush_remote(0, HV_FLUSH_EVICT_L2, mask, 0, 0, 0, NULL, NULL, 0);
}
-/* Return a mask of the cpus whose caches currently own these pages. */
-static void homecache_mask(struct page *page, int pages,
- struct cpumask *home_mask)
+/*
+ * Return a mask of the cpus whose caches currently own these pages.
+ * The return value is whether the pages are all coherently cached
+ * (i.e. none are immutable, incoherent, or uncached).
+ */
+static int homecache_mask(struct page *page, int pages,
+ struct cpumask *home_mask)
{
int i;
+ int cached_coherently = 1;
cpumask_clear(home_mask);
for (i = 0; i < pages; ++i) {
int home = page_home(&page[i]);
if (home == PAGE_HOME_IMMUTABLE ||
home == PAGE_HOME_INCOHERENT) {
cpumask_copy(home_mask, cpu_possible_mask);
- return;
+ return 0;
}
#if CHIP_HAS_CBOX_HOME_MAP()
if (home == PAGE_HOME_HASH) {
@@ -203,11 +226,14 @@ static void homecache_mask(struct page *page, int pages,
continue;
}
#endif
- if (home == PAGE_HOME_UNCACHED)
+ if (home == PAGE_HOME_UNCACHED) {
+ cached_coherently = 0;
continue;
+ }
BUG_ON(home < 0 || home >= NR_CPUS);
cpumask_set_cpu(home, home_mask);
}
+ return cached_coherently;
}
/*