diff options
| author | Bixuan Cui <cuibixuan@huawei.com> | 2021-05-29 11:06:57 +0300 |
|---|---|---|
| committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2021-06-09 03:05:03 +0300 |
| commit | ff76e3d7c3c958b51f095dfdb7d451177312896b (patch) | |
| tree | be4e1f5d4adc90ee7a4d531b506775dfd19215a1 /arch/riscv | |
| parent | cba43c31f14b08f193ebb5b4a72751b0947436c1 (diff) | |
| download | linux-ff76e3d7c3c958b51f095dfdb7d451177312896b.tar.xz | |
riscv: fix build error when CONFIG_SMP is disabled
Fix build error when disable CONFIG_SMP:
mm/pgtable-generic.o: In function `.L19':
pgtable-generic.c:(.text+0x42): undefined reference to `flush_pmd_tlb_range'
mm/pgtable-generic.o: In function `pmdp_huge_clear_flush':
pgtable-generic.c:(.text+0x6c): undefined reference to `flush_pmd_tlb_range'
mm/pgtable-generic.o: In function `pmdp_invalidate':
pgtable-generic.c:(.text+0x162): undefined reference to `flush_pmd_tlb_range'
Fixes: e88b333142e4 ("riscv: mm: add THP support on 64-bit")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Bixuan Cui <cuibixuan@huawei.com>
Acked-by: Nanyong Sun <sunnanyong@huawei.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/include/asm/pgtable.h | 5 | ||||
| -rw-r--r-- | arch/riscv/include/asm/tlbflush.h | 5 |
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index c103f0a278e5..f282f7a375e2 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -623,11 +623,6 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma, { return __pmd(atomic_long_xchg((atomic_long_t *)pmdp, pmd_val(pmd))); } - -#define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE -void flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end); - #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ /* diff --git a/arch/riscv/include/asm/tlbflush.h b/arch/riscv/include/asm/tlbflush.h index c84218ad7afc..801019381dea 100644 --- a/arch/riscv/include/asm/tlbflush.h +++ b/arch/riscv/include/asm/tlbflush.h @@ -33,6 +33,11 @@ void flush_tlb_mm(struct mm_struct *mm); void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr); void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); +#ifdef CONFIG_TRANSPARENT_HUGEPAGE +#define __HAVE_ARCH_FLUSH_PMD_TLB_RANGE +void flush_pmd_tlb_range(struct vm_area_struct *vma, unsigned long start, + unsigned long end); +#endif #else /* CONFIG_SMP && CONFIG_MMU */ #define flush_tlb_all() local_flush_tlb_all() |