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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2019-10-23 13:02:47 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2019-10-23 13:10:05 +0300 |
| commit | 2e79e22e092acd55da0b2db066e4826d7d152c41 (patch) | |
| tree | e7ec9782c0b7831c511af711424126a2b9a4eb07 /arch/riscv/include/asm/tlbflush.h | |
| parent | f1b4a9217efd61d0b84c6dc404596c8519ff6f59 (diff) | |
| parent | 7d194c2100ad2a6dded545887d02754948ca5241 (diff) | |
| download | linux-2e79e22e092acd55da0b2db066e4826d7d152c41.tar.xz | |
Merge v5.4-rc4 into drm-next
Thierry needs fd70c7755bf0 ("drm/bridge: tc358767: fix max_tu_symbol
value") to be able to merge his dp_link patch series.
Some adjacent changes conflicts, plus some clashes in i915 due to
cherry-picking and git trying to be helpful and leaving both versions
in.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'arch/riscv/include/asm/tlbflush.h')
| -rw-r--r-- | arch/riscv/include/asm/tlbflush.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/riscv/include/asm/tlbflush.h b/arch/riscv/include/asm/tlbflush.h index 37ae4e367ad2..f02188a5b0f4 100644 --- a/arch/riscv/include/asm/tlbflush.h +++ b/arch/riscv/include/asm/tlbflush.h @@ -10,10 +10,6 @@ #include <linux/mm_types.h> #include <asm/smp.h> -/* - * Flush entire local TLB. 'sfence.vma' implicitly fences with the instruction - * cache as well, so a 'fence.i' is not necessary. - */ static inline void local_flush_tlb_all(void) { __asm__ __volatile__ ("sfence.vma" : : : "memory"); |