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authorBai Yingjie <byj.tea@gmail.com>2020-01-06 07:29:54 +0300
committerMichael Ellerman <mpe@ellerman.id.au>2020-01-07 14:05:51 +0300
commiteeb09917c138ccd6d9a1c8410891ca2fa5feb5ea (patch)
treea0fc44fe108220af21732aa0c2c95f682dbe484a /arch/powerpc/platforms/85xx
parent6ad4afc97bc6c5cca9786030492ddfab871ce79e (diff)
downloadlinux-eeb09917c138ccd6d9a1c8410891ca2fa5feb5ea.tar.xz
powerpc/mpc85xx: also write addr_h to spin table for 64bit boot entry
CPU like P4080 has 36bit physical address, its DDR physical start address can be configured above 4G by LAW registers. For such systems in which their physical memory start address was configured higher than 4G, we need also to write addr_h into the spin table of the target secondary CPU, so that addr_h and addr_l together represent a 64bit physical address. Otherwise the secondary core can not get correct entry to start from. Signed-off-by: Bai Yingjie <byj.tea@gmail.com> Acked-by: Scott Wood <oss@buserror.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200106042957.26494-2-yingjie_bai@126.com
Diffstat (limited to 'arch/powerpc/platforms/85xx')
-rw-r--r--arch/powerpc/platforms/85xx/smp.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 8c7ea2486bc0..48f7d96ae37d 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -252,6 +252,15 @@ static int smp_85xx_start_cpu(int cpu)
out_be64((u64 *)(&spin_table->addr_h),
__pa(ppc_function_entry(generic_secondary_smp_init)));
#else
+#ifdef CONFIG_PHYS_ADDR_T_64BIT
+ /*
+ * We need also to write addr_h to spin table for systems
+ * in which their physical memory start address was configured
+ * to above 4G, otherwise the secondary core can not get
+ * correct entry to start from.
+ */
+ out_be32(&spin_table->addr_h, __pa(__early_start) >> 32);
+#endif
out_be32(&spin_table->addr_l, __pa(__early_start));
#endif
flush_spin_table(spin_table);