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authorNaveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>2017-02-08 11:57:29 +0300
committerMichael Ellerman <mpe@ellerman.id.au>2017-02-10 05:28:03 +0300
commitc233f5979b3dbb39a5b2473b5fcaf58baec8f1bd (patch)
tree60ab99c5c0d6e7c4b3403d58bd7af6c5e5d0d871 /arch/powerpc/net
parent438cc81a41e8c2905d0f4f300d4690445b2ab240 (diff)
downloadlinux-c233f5979b3dbb39a5b2473b5fcaf58baec8f1bd.tar.xz
powerpc/bpf: Introduce __PPC_SH64()
Introduce __PPC_SH64() as a 64-bit variant to encode shift field in some of the shift and rotate instructions operating on double-words. Convert some of the BPF instruction macros to use the same. Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/net')
-rw-r--r--arch/powerpc/net/bpf_jit.h11
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
index 89f70073dec8..30cf03f53428 100644
--- a/arch/powerpc/net/bpf_jit.h
+++ b/arch/powerpc/net/bpf_jit.h
@@ -157,8 +157,7 @@
#define PPC_SRAD(d, a, s) EMIT(PPC_INST_SRAD | ___PPC_RA(d) | \
___PPC_RS(a) | ___PPC_RB(s))
#define PPC_SRADI(d, a, i) EMIT(PPC_INST_SRADI | ___PPC_RA(d) | \
- ___PPC_RS(a) | __PPC_SH(i) | \
- (((i) & 0x20) >> 4))
+ ___PPC_RS(a) | __PPC_SH64(i))
#define PPC_RLWINM(d, a, i, mb, me) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \
___PPC_RS(a) | __PPC_SH(i) | \
__PPC_MB(mb) | __PPC_ME(me))
@@ -166,11 +165,11 @@
___PPC_RS(a) | __PPC_SH(i) | \
__PPC_MB(mb) | __PPC_ME(me))
#define PPC_RLDICL(d, a, i, mb) EMIT(PPC_INST_RLDICL | ___PPC_RA(d) | \
- ___PPC_RS(a) | __PPC_SH(i) | \
- __PPC_MB64(mb) | (((i) & 0x20) >> 4))
+ ___PPC_RS(a) | __PPC_SH64(i) | \
+ __PPC_MB64(mb))
#define PPC_RLDICR(d, a, i, me) EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \
- ___PPC_RS(a) | __PPC_SH(i) | \
- __PPC_ME64(me) | (((i) & 0x20) >> 4))
+ ___PPC_RS(a) | __PPC_SH64(i) | \
+ __PPC_ME64(me))
/* slwi = rlwinm Rx, Ry, n, 0, 31-n */
#define PPC_SLWI(d, a, i) PPC_RLWINM(d, a, i, 0, 31-(i))