diff options
author | Cyril Bur <cyrilbur@gmail.com> | 2016-09-23 09:18:25 +0300 |
---|---|---|
committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-10-04 12:33:16 +0300 |
commit | 000ec280e3dd5c77a5227db27bfda1511e26db9a (patch) | |
tree | 85e359de526c95627c3b11bc8f31050800e48a8a /arch/powerpc/kernel/tm.S | |
parent | dc3106690b20305c3df06b42456fe386dd632ac9 (diff) | |
download | linux-000ec280e3dd5c77a5227db27bfda1511e26db9a.tar.xz |
powerpc: tm: Rename transct_(*) to ck(\1)_state
Make the structures being used for checkpointed state named
consistently with the pt_regs/ckpt_regs.
Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel/tm.S')
-rw-r--r-- | arch/powerpc/kernel/tm.S | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S index 7b7088d8d130..3a2d04134da9 100644 --- a/arch/powerpc/kernel/tm.S +++ b/arch/powerpc/kernel/tm.S @@ -257,19 +257,19 @@ _GLOBAL(tm_reclaim) andis. r0, r4, MSR_VEC@h beq dont_backup_vec - addi r7, r3, THREAD_TRANSACT_VRSTATE + addi r7, r3, THREAD_CKVRSTATE SAVE_32VRS(0, r6, r7) /* r6 scratch, r7 transact vr state */ mfvscr v0 li r6, VRSTATE_VSCR stvx v0, r7, r6 dont_backup_vec: mfspr r0, SPRN_VRSAVE - std r0, THREAD_TRANSACT_VRSAVE(r3) + std r0, THREAD_CKVRSAVE(r3) andi. r0, r4, MSR_FP beq dont_backup_fp - addi r7, r3, THREAD_TRANSACT_FPSTATE + addi r7, r3, THREAD_CKFPSTATE SAVE_32FPRS_VSRS(0, R6, R7) /* r6 scratch, r7 transact fp state */ mffs fr0 @@ -370,20 +370,20 @@ _GLOBAL(__tm_recheckpoint) andis. r0, r4, MSR_VEC@h beq dont_restore_vec - addi r8, r3, THREAD_TRANSACT_VRSTATE + addi r8, r3, THREAD_CKVRSTATE li r5, VRSTATE_VSCR lvx v0, r8, r5 mtvscr v0 REST_32VRS(0, r5, r8) /* r5 scratch, r8 ptr */ dont_restore_vec: - ld r5, THREAD_TRANSACT_VRSAVE(r3) + ld r5, THREAD_CKVRSAVE(r3) mtspr SPRN_VRSAVE, r5 #endif andi. r0, r4, MSR_FP beq dont_restore_fp - addi r8, r3, THREAD_TRANSACT_FPSTATE + addi r8, r3, THREAD_CKFPSTATE lfd fr0, FPSTATE_FPSCR(r8) MTFSF_L(fr0) REST_32FPRS_VSRS(0, R4, R8) |