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author | Christophe Leroy <christophe.leroy@c-s.fr> | 2019-08-26 18:52:18 +0300 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2019-08-28 16:19:33 +0300 |
commit | e0291f1decd6e8d447067f7d2cf01b1091b7cb3f (patch) | |
tree | a49ee0c2469f9b13dc873d4ad6c8599d2820b06f /arch/powerpc/kernel/misc_32.S | |
parent | 39097b9c6d762d3fcd6f753e05ee3e34ec250ff3 (diff) | |
download | linux-e0291f1decd6e8d447067f7d2cf01b1091b7cb3f.tar.xz |
powerpc/32: drop CPU_FTR_UNIFIED_ID_CACHE
Only 601 and e200 have unified I/D cache.
Drop the feature and use CONFIG_PPC_BOOK3S_601 and CONFIG_E200.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/b5902144266d2f4eed1ffea53915bd0245841e02.1566834712.git.christophe.leroy@c-s.fr
Diffstat (limited to 'arch/powerpc/kernel/misc_32.S')
-rw-r--r-- | arch/powerpc/kernel/misc_32.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index b917641cdaa6..3d21fb110797 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S @@ -292,14 +292,14 @@ _GLOBAL(flush_instruction_cache) iccci 0,r3 #endif #elif defined(CONFIG_FSL_BOOKE) -BEGIN_FTR_SECTION +#ifdef CONFIG_E200 mfspr r3,SPRN_L1CSR0 ori r3,r3,L1CSR0_CFI|L1CSR0_CLFC /* msync; isync recommended here */ mtspr SPRN_L1CSR0,r3 isync blr -END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE) +#endif mfspr r3,SPRN_L1CSR1 ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR mtspr SPRN_L1CSR1,r3 |