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authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>2016-07-13 12:36:43 +0300
committerMichael Ellerman <mpe@ellerman.id.au>2016-08-01 04:15:13 +0300
commit5491ae7b6f48499b8892822cff371746f0b4102f (patch)
treea8bb6c61ba9276e1b64d4ad2ef1b6c10b8508929 /arch/powerpc/include/asm/book3s/64/tlbflush.h
parentfbfa26d85418a155feacdb0f73cbf938f1027a8c (diff)
downloadlinux-5491ae7b6f48499b8892822cff371746f0b4102f.tar.xz
powerpc/mm/hugetlb: Add flush_hugetlb_tlb_range
Some archs like ppc64 need to do special things when flushing tlb for hugepage. Add a new helper to flush hugetlb tlb range. This helps us to avoid flushing the entire tlb mapping for the pid. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/book3s/64/tlbflush.h')
-rw-r--r--arch/powerpc/include/asm/book3s/64/tlbflush.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush.h b/arch/powerpc/include/asm/book3s/64/tlbflush.h
index 0790c4e92a64..146b269de8fa 100644
--- a/arch/powerpc/include/asm/book3s/64/tlbflush.h
+++ b/arch/powerpc/include/asm/book3s/64/tlbflush.h
@@ -16,6 +16,16 @@ static inline void flush_pmd_tlb_range(struct vm_area_struct *vma,
return hash__flush_tlb_range(vma, start, end);
}
+#define __HAVE_ARCH_FLUSH_HUGETLB_TLB_RANGE
+static inline void flush_hugetlb_tlb_range(struct vm_area_struct *vma,
+ unsigned long start,
+ unsigned long end)
+{
+ if (radix_enabled())
+ return radix__flush_hugetlb_tlb_range(vma, start, end);
+ return hash__flush_tlb_range(vma, start, end);
+}
+
static inline void flush_tlb_range(struct vm_area_struct *vma,
unsigned long start, unsigned long end)
{