diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2008-05-30 22:43:43 +0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2008-06-02 23:44:25 +0400 |
commit | c054065bc10a7ee2bcf78b5bc95f4b4d9bdc923a (patch) | |
tree | 023b60c1b55c04c2db08983a3aaef151d081fcac /arch/powerpc/boot/dts/stx_gp3_8560.dts | |
parent | acd4b715ec83e451990bb82bdbf28ecaeab1b67d (diff) | |
download | linux-c054065bc10a7ee2bcf78b5bc95f4b4d9bdc923a.tar.xz |
[POWERPC] 85xx: Add next-level-cache property
Added next-level-cache to the L1 and a reference to the new L2 label.
This is per the ePAPR 0.94 spec. Since we are't really dependent on this
today we aren't supporting the "legacy" l2-cache phandle that is specified
in the PPC v2.1 OF Binding spec.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/stx_gp3_8560.dts')
-rw-r--r-- | arch/powerpc/boot/dts/stx_gp3_8560.dts | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts index 096277b7192d..1e612836b248 100644 --- a/arch/powerpc/boot/dts/stx_gp3_8560.dts +++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts @@ -38,6 +38,7 @@ timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; + next-level-cache = <&L2>; }; }; @@ -62,7 +63,7 @@ interrupts = <18 2>; }; - l2-cache-controller@20000 { + L2: l2-cache-controller@20000 { compatible = "fsl,8540-l2-cache-controller"; reg = <0x20000 0x1000>; cache-line-size = <32>; |