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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-03-10 20:13:37 +0300 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-03-10 20:13:37 +0300 |
| commit | d6075262969321bcb5d795de25595fc2a141ac02 (patch) | |
| tree | 8b9021abdbec609fb44a265af7362c4fbed30b37 /arch/nios2/include | |
| parent | 6cdc577a18a616c331f57e268c97466171cfc45f (diff) | |
| parent | 21e6bff5e0ef0033d776e64c40e6873d7c75e74b (diff) | |
| download | linux-d6075262969321bcb5d795de25595fc2a141ac02.tar.xz | |
Merge tag 'nios2-v5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2
Pull nios2 updates from Ley Foon Tan:
"Most of updates are MMU related"
* tag 'nios2-v5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2:
nios2: Fix update_mmu_cache preload the TLB with the new PTE
nios2: update_mmu_cache preload the TLB with the new PTE
nios2: User address TLB flush break after finding the matching entry
nios2: flush_tlb_all use TLBMISC way auto-increment feature
nios2: improve readability of tlb functions
nios2: flush_tlb_mm flush only the pid
nios2: flush_tlb_pid can just restore TLBMISC once
nios2: TLBMISC writes do not require PID bits to be set
nios2: Use an invalid TLB entry address helper function
nios2: pte_clear does not need to flush TLB
nios2: flush_tlb_page use PID based flush
nios2: update_mmu_cache clear the old entry from the TLB
nios2: remove redundant 'default n' from Kconfig-s
nios2: ksyms: Add missing symbol exports
Diffstat (limited to 'arch/nios2/include')
| -rw-r--r-- | arch/nios2/include/asm/pgtable.h | 1 | ||||
| -rw-r--r-- | arch/nios2/include/asm/tlbflush.h | 19 |
2 files changed, 15 insertions, 5 deletions
diff --git a/arch/nios2/include/asm/pgtable.h b/arch/nios2/include/asm/pgtable.h index db4f7d179220..95237b7f6fc1 100644 --- a/arch/nios2/include/asm/pgtable.h +++ b/arch/nios2/include/asm/pgtable.h @@ -232,7 +232,6 @@ static inline void pte_clear(struct mm_struct *mm, pte_val(null) = (addr >> PAGE_SHIFT) & 0xf; set_pte_at(mm, addr, ptep, null); - flush_tlb_one(addr); } /* diff --git a/arch/nios2/include/asm/tlbflush.h b/arch/nios2/include/asm/tlbflush.h index e19652fca1c6..b4bf487b9832 100644 --- a/arch/nios2/include/asm/tlbflush.h +++ b/arch/nios2/include/asm/tlbflush.h @@ -26,21 +26,32 @@ struct mm_struct; * * - flush_tlb_all() flushes all processes TLB entries * - flush_tlb_mm(mm) flushes the specified mm context TLB entries - * - flush_tlb_page(vma, vmaddr) flushes one page * - flush_tlb_range(vma, start, end) flushes a range of pages + * - flush_tlb_page(vma, address) flushes a page * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages + * - flush_tlb_kernel_page(address) flushes a kernel page + * + * - reload_tlb_page(vma, address, pte) flushes the TLB for address like + * flush_tlb_page, then replaces it with a TLB for pte. */ extern void flush_tlb_all(void); extern void flush_tlb_mm(struct mm_struct *mm); extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); -extern void flush_tlb_one(unsigned long vaddr); static inline void flush_tlb_page(struct vm_area_struct *vma, - unsigned long addr) + unsigned long address) { - flush_tlb_one(addr); + flush_tlb_range(vma, address, address + PAGE_SIZE); } +static inline void flush_tlb_kernel_page(unsigned long address) +{ + flush_tlb_kernel_range(address, address + PAGE_SIZE); +} + +extern void reload_tlb_page(struct vm_area_struct *vma, unsigned long addr, + pte_t pte); + #endif /* _ASM_NIOS2_TLBFLUSH_H */ |