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authorWolfram Sang <wsa@the-dreams.de>2018-07-29 13:35:45 +0300
committerWolfram Sang <wsa@the-dreams.de>2018-07-29 13:35:45 +0300
commitb1d2b0a43d288836bce5e708b88981e2df0bf594 (patch)
tree1129478b713c33186fc10c50f84f9eed8f931ea2 /arch/nds32/include/asm/cacheflush.h
parent3b770017b03a4cdfde0b61a49b4801dc8cca9f69 (diff)
parenta2b3bf4846e5eed62ea6abb096af2c950961033c (diff)
downloadlinux-b1d2b0a43d288836bce5e708b88981e2df0bf594.tar.xz
Merge tag 'at24-4.19-updates-for-wolfram' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into i2c/for-4.19
at24: updates for v4.19 New property: 'address-width' which allows to specify the number of addressing bits. Up until now we only could choose one of the defined models and rely on the flags specified in its corresponding chip data structure.
Diffstat (limited to 'arch/nds32/include/asm/cacheflush.h')
-rw-r--r--arch/nds32/include/asm/cacheflush.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/nds32/include/asm/cacheflush.h b/arch/nds32/include/asm/cacheflush.h
index 10b48f0d8e85..8b26198d51bb 100644
--- a/arch/nds32/include/asm/cacheflush.h
+++ b/arch/nds32/include/asm/cacheflush.h
@@ -8,6 +8,8 @@
#define PG_dcache_dirty PG_arch_1
+void flush_icache_range(unsigned long start, unsigned long end);
+void flush_icache_page(struct vm_area_struct *vma, struct page *page);
#ifdef CONFIG_CPU_CACHE_ALIASING
void flush_cache_mm(struct mm_struct *mm);
void flush_cache_dup_mm(struct mm_struct *mm);
@@ -34,13 +36,16 @@ void flush_anon_page(struct vm_area_struct *vma,
void flush_kernel_dcache_page(struct page *page);
void flush_kernel_vmap_range(void *addr, int size);
void invalidate_kernel_vmap_range(void *addr, int size);
-void flush_icache_range(unsigned long start, unsigned long end);
-void flush_icache_page(struct vm_area_struct *vma, struct page *page);
#define flush_dcache_mmap_lock(mapping) xa_lock_irq(&(mapping)->i_pages)
#define flush_dcache_mmap_unlock(mapping) xa_unlock_irq(&(mapping)->i_pages)
#else
#include <asm-generic/cacheflush.h>
+#undef flush_icache_range
+#undef flush_icache_page
+#undef flush_icache_user_range
+void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
+ unsigned long addr, int len);
#endif
#endif /* __NDS32_CACHEFLUSH_H__ */