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author | Paolo Bonzini <pbonzini@redhat.com> | 2019-07-11 16:14:16 +0300 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2019-07-11 16:14:16 +0300 |
commit | a45ff5994c9cde41af627c46abb9f32beae68943 (patch) | |
tree | b726cc506ed1b01484f183ab2679cdd618e1e9b1 /arch/mips/math-emu/ieee754int.h | |
parent | 429bb83af8bcea0115eb34fd7ed94a35166d8384 (diff) | |
parent | 1e0cf16cdad1ba53e9eeee8746fe57de42f20c97 (diff) | |
download | linux-a45ff5994c9cde41af627c46abb9f32beae68943.tar.xz |
Merge tag 'kvm-arm-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm updates for 5.3
- Add support for chained PMU counters in guests
- Improve SError handling
- Handle Neoverse N1 erratum #1349291
- Allow side-channel mitigation status to be migrated
- Standardise most AArch64 system register accesses to msr_s/mrs_s
- Fix host MPIDR corruption on 32bit
Diffstat (limited to 'arch/mips/math-emu/ieee754int.h')
-rw-r--r-- | arch/mips/math-emu/ieee754int.h | 14 |
1 files changed, 1 insertions, 13 deletions
diff --git a/arch/mips/math-emu/ieee754int.h b/arch/mips/math-emu/ieee754int.h index 06ac0e2ac7ac..52b20119e315 100644 --- a/arch/mips/math-emu/ieee754int.h +++ b/arch/mips/math-emu/ieee754int.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * IEEE754 floating point * common internal header file @@ -5,19 +6,6 @@ /* * MIPS floating point support * Copyright (C) 1994-2000 Algorithmics Ltd. - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. */ #ifndef __IEEE754INT_H #define __IEEE754INT_H |