diff options
| author | John Crispin <blogic@openwrt.org> | 2013-01-19 12:54:24 +0400 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2013-02-17 03:15:17 +0400 |
| commit | 740c606e8e79c3e3800afbc32b4e6123da403d6c (patch) | |
| tree | d8fad6b56dcdcdfba522011bab2e114d221ba6a3 /arch/mips/lantiq/clk.h | |
| parent | 3d18c17e4f1699c3a4f47d2483c5d4c3ab3a242b (diff) | |
| download | linux-740c606e8e79c3e3800afbc32b4e6123da403d6c.tar.xz | |
MIPS: lantiq: adds static clock for PP32
The Lantiq DSL SoCs have an internal networking processor. Add code to read
the static clock rate.
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4815/
Diffstat (limited to 'arch/mips/lantiq/clk.h')
| -rw-r--r-- | arch/mips/lantiq/clk.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/mips/lantiq/clk.h b/arch/mips/lantiq/clk.h index fa670602b91b..77e4bdb1fe8c 100644 --- a/arch/mips/lantiq/clk.h +++ b/arch/mips/lantiq/clk.h @@ -27,12 +27,15 @@ #define CLOCK_167M 166666667 #define CLOCK_196_608M 196608000 #define CLOCK_200M 200000000 +#define CLOCK_222M 222000000 +#define CLOCK_240M 240000000 #define CLOCK_250M 250000000 #define CLOCK_266M 266666666 #define CLOCK_300M 300000000 #define CLOCK_333M 333333333 #define CLOCK_393M 393215332 #define CLOCK_400M 400000000 +#define CLOCK_450M 450000000 #define CLOCK_500M 500000000 #define CLOCK_600M 600000000 @@ -64,15 +67,17 @@ struct clk { }; extern void clkdev_add_static(unsigned long cpu, unsigned long fpi, - unsigned long io); + unsigned long io, unsigned long ppe); extern unsigned long ltq_danube_cpu_hz(void); extern unsigned long ltq_danube_fpi_hz(void); +extern unsigned long ltq_danube_pp32_hz(void); extern unsigned long ltq_ar9_cpu_hz(void); extern unsigned long ltq_ar9_fpi_hz(void); extern unsigned long ltq_vr9_cpu_hz(void); extern unsigned long ltq_vr9_fpi_hz(void); +extern unsigned long ltq_vr9_pp32_hz(void); #endif |