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| author | Florian Fainelli <florian@openwrt.org> | 2013-07-24 20:12:11 +0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-07-30 20:54:29 +0400 |
| commit | ff5fadaff39180dc0b652753b5614a564711be29 (patch) | |
| tree | 07662c3a1f58bd8355a4f7d3da23c2962f15be07 /arch/mips/include/asm/mach-generic/spaces.h | |
| parent | c4091d3fbbed922a3641e5e749655e49cc0d4dee (diff) | |
| download | linux-ff5fadaff39180dc0b652753b5614a564711be29.tar.xz | |
MIPS: BMIPS: fix slave CPU booting when physical CPU is not 0
The current BMIPS SMP code assumes that the slave CPU is physical and
logical CPU 1, but on some systems such as BCM3368, the slave CPU is
physical CPU0. Fix the code to read the physical CPU (thread ID) we are
running this code on, and adjust the relocation vector address based on
it. This allows bringing up the second CPU on BCM3368 for instance.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Cc: blogic@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5621/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-generic/spaces.h')
0 files changed, 0 insertions, 0 deletions