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| author | Florian Fainelli <f.fainelli@gmail.com> | 2016-02-09 23:55:51 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-13 16:30:25 +0300 |
| commit | 8256b17ecb028949d80c982d0f28ad46fe4e73d8 (patch) | |
| tree | 18caab2e4f081a22d5aab9dc17552c948074e1f4 /arch/mips/Kconfig | |
| parent | e56c7e18818dd721179f9ca95c77dd941a360384 (diff) | |
| download | linux-8256b17ecb028949d80c982d0f28ad46fe4e73d8.tar.xz | |
MIPS: Allow RIXI to be used on non-R2 or R6 cores
Some processors, like Broadcom's BMIPS4380 and BMIPS5000 support RIXI and the
"rotr" instruction, which can be used to get a slightly more efficient page
table layout.
Introduce a CONFIG_CPU_HAS_RIXI such that those cores can benefit from this
feature. Perform the conditional check updates where relevant.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: john@phrozen.org
Cc: cernekee@gmail.com
Cc: jon.fraser@broadcom.com
Cc: pgynther@google.com
Cc: paul.burton@imgtec.com
Cc: ddaney.cavm@gmail.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12505/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/Kconfig')
| -rw-r--r-- | arch/mips/Kconfig | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index d10ed57ad418..5562ee535db8 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1996,11 +1996,13 @@ config CPU_MIPSR1 config CPU_MIPSR2 bool default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON + select CPU_HAS_RIXI select MIPS_SPRAM config CPU_MIPSR6 bool default y if CPU_MIPS32_R6 || CPU_MIPS64_R6 + select CPU_HAS_RIXI select HAVE_ARCH_BITREVERSE select MIPS_ASID_BITS_VARIABLE select MIPS_SPRAM @@ -2421,6 +2423,9 @@ config CPU_HAS_WB config XKS01 bool +config CPU_HAS_RIXI + bool + # # Vectored interrupt mode is an R2 feature # |