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authorArnd Bergmann <arnd@arndb.de>2013-05-07 01:38:00 +0400
committerArnd Bergmann <arnd@arndb.de>2013-05-07 01:38:00 +0400
commit4183bef2e093a2f0aab45f2d5fed82b0e02aeacf (patch)
treee84c484db3746a0f3ead0fb7a2bb9e5a42b89e85 /arch/mips/Kconfig
parent662478d060a39b8faf2b1fe2fbbb212556c2e052 (diff)
parent775c4f66fd855e68a98fc5049003810fe98e2e20 (diff)
downloadlinux-4183bef2e093a2f0aab45f2d5fed82b0e02aeacf.tar.xz
Merge branch 'late/dt' into next/dt2
This is support for the ARM Chromebook, originally scheduled as a "late" pull request. Since it's already late now, we can combine this into the existing next/dt2 branch. * late/dt: ARM: exynos: dts: cros5250: add EC device ARM: dts: Add sbs-battery for exynos5250-snow ARM: dts: Add i2c-arbitrator bus for exynos5250-snow ARM: dts: Add chip-id controller node on Exynos4/5 SoC ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree
Diffstat (limited to 'arch/mips/Kconfig')
-rw-r--r--arch/mips/Kconfig7
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index cd2e21ff562a..51244bf97271 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -18,7 +18,7 @@ config MIPS
select HAVE_KRETPROBES
select HAVE_DEBUG_KMEMLEAK
select ARCH_BINFMT_ELF_RANDOMIZE_PIE
- select HAVE_ARCH_TRANSPARENT_HUGEPAGE
+ select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
select RTC_LIB if !MACH_LOONGSON
select GENERIC_ATOMIC64 if !64BIT
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
@@ -657,7 +657,7 @@ config SNI_RM
bool "SNI RM200/300/400"
select FW_ARC if CPU_LITTLE_ENDIAN
select FW_ARC32 if CPU_LITTLE_ENDIAN
- select SNIPROM if CPU_BIG_ENDIAN
+ select FW_SNIPROM if CPU_BIG_ENDIAN
select ARCH_MAY_HAVE_PC_FDC
select BOOT_ELF32
select CEVT_R4K
@@ -1144,7 +1144,7 @@ config DEFAULT_SGI_PARTITION
config FW_ARC32
bool
-config SNIPROM
+config FW_SNIPROM
bool
config BOOT_ELF32
@@ -1493,7 +1493,6 @@ config CPU_XLP
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
- select CPU_HAS_LLSC
select WEAK_ORDERING
select WEAK_REORDERING_BEYOND_LLSC
select CPU_HAS_PREFETCH