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authorGreg Ungerer <gerg@uclinux.org>2011-12-24 04:13:36 +0400
committerGreg Ungerer <gerg@uclinux.org>2012-03-05 03:43:08 +0400
commit9a11b493edcc4b740bac5ccbe9167e4ef12e4668 (patch)
tree7f43252f1d7421479013eda6b24984e6ad139244 /arch/m68k/include/asm/m5272sim.h
parent21634593b42308631788359cba9d7671383ae762 (diff)
downloadlinux-9a11b493edcc4b740bac5ccbe9167e4ef12e4668.tar.xz
m68knommu: make 5272 FEC platform addressing consistent
If we make all FEC (ethernet) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 5272 FEC addressing so that: . FECs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m5272sim.h')
-rw-r--r--arch/m68k/include/asm/m5272sim.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index 5c71bd4c746d..a58f1760d858 100644
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -88,6 +88,9 @@
#define MCFTIMER_BASE3 (MCF_MBAR + 0x240) /* Base address TIMER4 */
#define MCFTIMER_BASE4 (MCF_MBAR + 0x260) /* Base address TIMER3 */
+#define MCFFEC_BASE0 (MCF_MBAR + 0x840) /* Base FEC ethernet */
+#define MCFFEC_SIZE0 0x1d0
+
/*
* Define system peripheral IRQ usage.
*/
@@ -114,9 +117,9 @@
#define MCF_IRQ_USB6 83 /* USB Endpoint 6 */
#define MCF_IRQ_USB7 84 /* USB Endpoint 7 */
#define MCF_IRQ_DMA 85 /* DMA Controller */
-#define MCF_IRQ_ERX 86 /* Ethernet Receiver */
-#define MCF_IRQ_ETX 87 /* Ethernet Transmitter */
-#define MCF_IRQ_ENTC 88 /* Ethernet Non-Time Critical */
+#define MCF_IRQ_FECRX0 86 /* Ethernet Receiver */
+#define MCF_IRQ_FECTX0 87 /* Ethernet Transmitter */
+#define MCF_IRQ_FECENTC0 88 /* Ethernet Non-Time Critical */
#define MCF_IRQ_QSPI 89 /* Queued Serial Interface */
#define MCF_IRQ_EINT5 90 /* External Interrupt 5 */
#define MCF_IRQ_EINT6 91 /* External Interrupt 6 */