diff options
| author | David Howells <dhowells@redhat.com> | 2012-10-09 12:46:39 +0400 |
|---|---|---|
| committer | Bob Liu <lliubbo@gmail.com> | 2012-12-13 09:50:56 +0400 |
| commit | 2ba364504f2c31665007330dec23e89e44f5864e (patch) | |
| tree | 3f731d76a23441ca78e55d4838689a1a871da63a /arch/blackfin/include/uapi/asm/fixed_code.h | |
| parent | 29594404d7fe73cd80eaa4ee8c43dcc53970c60e (diff) | |
| download | linux-2ba364504f2c31665007330dec23e89e44f5864e.tar.xz | |
UAPI: (Scripted) Disintegrate arch/blackfin/include/asm
Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Michael Kerrisk <mtk.manpages@gmail.com>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Dave Jones <davej@redhat.com>
Diffstat (limited to 'arch/blackfin/include/uapi/asm/fixed_code.h')
| -rw-r--r-- | arch/blackfin/include/uapi/asm/fixed_code.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/blackfin/include/uapi/asm/fixed_code.h b/arch/blackfin/include/uapi/asm/fixed_code.h new file mode 100644 index 000000000000..3bef1dca379f --- /dev/null +++ b/arch/blackfin/include/uapi/asm/fixed_code.h @@ -0,0 +1,38 @@ +/* + * This file defines the fixed addresses where userspace programs + * can find atomic code sequences. + * + * Copyright 2007-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#ifndef _UAPI__BFIN_ASM_FIXED_CODE_H__ +#define _UAPI__BFIN_ASM_FIXED_CODE_H__ + + +#ifndef CONFIG_PHY_RAM_BASE_ADDRESS +#define CONFIG_PHY_RAM_BASE_ADDRESS 0x0 +#endif + +#define FIXED_CODE_START (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400) + +#define SIGRETURN_STUB (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400) + +#define ATOMIC_SEQS_START (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410) + +#define ATOMIC_XCHG32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410) +#define ATOMIC_CAS32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x420) +#define ATOMIC_ADD32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x430) +#define ATOMIC_SUB32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x440) +#define ATOMIC_IOR32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x450) +#define ATOMIC_AND32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x460) +#define ATOMIC_XOR32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x470) + +#define ATOMIC_SEQS_END (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480) + +#define SAFE_USER_INSTRUCTION (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480) + +#define FIXED_CODE_END (CONFIG_PHY_RAM_BASE_ADDRESS + 0x490) + +#endif /* _UAPI__BFIN_ASM_FIXED_CODE_H__ */ |