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authorWill Deacon <will.deacon@arm.com>2012-12-02 21:44:36 +0400
committerWill Deacon <will.deacon@arm.com>2013-01-11 01:09:32 +0400
commit4e3c1944808b0278ea4733afcde5cb9421f8a570 (patch)
tree4e2e78617620b6c0d252dbff98eeaa811e3c0fab /arch/arm
parent8e9c24a2b2e00368262b974d6ea1ac5310570bbe (diff)
downloadlinux-4e3c1944808b0278ea4733afcde5cb9421f8a570.tar.xz
ARM: virt: use PSR_N_BIT for detecting boot CPU mode mismatch
During boot, we detect whether or not all CPUs are brought up in the same mode and signal this to the kernel using the N bit in the SPSR. This patch tidies up the checking code to use the PSR_N_BIT macro, rather than hardcoding the bit field and commenting it as such. Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/virt.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/include/asm/virt.h b/arch/arm/include/asm/virt.h
index 86164df86cb4..50af92bac737 100644
--- a/arch/arm/include/asm/virt.h
+++ b/arch/arm/include/asm/virt.h
@@ -24,9 +24,9 @@
/*
* Flag indicating that the kernel was not entered in the same mode on every
* CPU. The zImage loader stashes this value in an SPSR, so we need an
- * architecturally defined flag bit here (the N flag, as it happens)
+ * architecturally defined flag bit here.
*/
-#define BOOT_CPU_MODE_MISMATCH (1<<31)
+#define BOOT_CPU_MODE_MISMATCH PSR_N_BIT
#ifndef __ASSEMBLY__