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| author | Andre Przywara <andre.przywara@arm.com> | 2016-06-28 20:07:29 +0300 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2016-07-01 13:28:16 +0300 |
| commit | 823066d9edcdfe4cedb06216c2b1f91efaf68a87 (patch) | |
| tree | 842c741d4a6b8fba2400be099094f5aef26fc399 /arch/arm64/kernel/cpufeature.c | |
| parent | 290622efc76ece22ef76a30bf117755891ab27f6 (diff) | |
| download | linux-823066d9edcdfe4cedb06216c2b1f91efaf68a87.tar.xz | |
arm64: include alternative handling in dcache_by_line_op
The newly introduced dcache_by_line_op macro is used at least in
one occassion at the moment to issue a "dc cvau" instruction,
which is affected by ARM errata 819472, 826319, 827319 and 824069.
Change the macro to allow for alternative patching in there to
protect affected Cortex-A53 cores.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[catalin.marinas@arm.com: indentation fixups]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/cpufeature.c')
0 files changed, 0 insertions, 0 deletions