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authorMarc Zyngier <marc.zyngier@arm.com>2018-08-06 14:51:19 +0300
committerMarc Zyngier <marc.zyngier@arm.com>2018-08-12 14:06:34 +0300
commit6249f2a479268702f7259aeee3671db2be3b922c (patch)
treec92ae92e666a5f7afe003b3f48d9d4e58855dfd0 /arch/arm64/include/asm/clocksource.h
parente22fa39cd0132c409c8648e60282837d19643634 (diff)
downloadlinux-6249f2a479268702f7259aeee3671db2be3b922c.tar.xz
KVM: arm/arm64: vgic-v3: Add core support for Group0 SGIs
Although vgic-v3 now supports Group0 interrupts, it still doesn't deal with Group0 SGIs. As usually with the GIC, nothing is simple: - ICC_SGI1R can signal SGIs of both groups, since GICD_CTLR.DS==1 with KVM (as per 8.1.10, Non-secure EL1 access) - ICC_SGI0R can only generate Group0 SGIs - ICC_ASGI1R sees its scope refocussed to generate only Group0 SGIs (as per the note at the bottom of Table 8-14) We only support Group1 SGIs so far, so no material change. Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Christoffer Dall <christoffer.dall@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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