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author | Heiko Stuebner <heiko@sntech.de> | 2017-12-09 00:46:45 +0300 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2017-12-16 20:15:24 +0300 |
commit | 752fbc0c8da7403e75cf49bfb6432d474aeeaefa (patch) | |
tree | b2dccc11bc77cefa1ffa63feb4f4126737fabd31 /arch/arm64/boot/dts/rockchip | |
parent | c10e65b5874fe08643e40bf8d4d80627cc5e5da5 (diff) | |
download | linux-752fbc0c8da7403e75cf49bfb6432d474aeeaefa.tar.xz |
arm64: dts: rockchip: add rk3328 mali gpu node
Add the core gpu node for the rk3328, a Mali450MP2.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip')
-rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3328.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 41d61840fb99..48f8d4fc34a3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -543,6 +543,28 @@ status = "disabled"; }; + gpu: gpu@ff300000 { + compatible = "rockchip,rk3328-mali", "arm,mali-450"; + reg = <0x0 0xff300000 0x0 0x40000>; + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gp", + "gpmmu", + "pp", + "pp0", + "ppmmu0", + "pp1", + "ppmmu1"; + clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; + clock-names = "bus", "core"; + resets = <&cru SRST_GPU_A>; + }; + h265e_mmu: iommu@ff330200 { compatible = "rockchip,iommu"; reg = <0x0 0xff330200 0 0x100>; |