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authorBastian Köcher <git@kchr.de>2016-11-04 23:56:36 +0300
committerAndy Gross <andy.gross@linaro.org>2016-11-13 07:57:56 +0300
commitfeeaf56ac78d283efe65ea60ec999d4bf3cf395e (patch)
treeb923f0cb635688fb1305e1bf1ba8971d355bedcd /arch/arm64/boot/dts/qcom/msm8994-pins.dtsi
parenta3da91576618122668900fc83bbb956e6a58509d (diff)
downloadlinux-feeaf56ac78d283efe65ea60ec999d4bf3cf395e.tar.xz
arm64: dts: msm8994 SoC and Huawei Angler (Nexus 6P) support
Initial device tree support for Qualcomm MSM8994 SoC and Huawei Angler / Google Nexus 6P support. The device tree is based on the Google 3.10 kernel tree. The device can be booted into the initrd with only one CPU running. Signed-off-by: Bastian Köcher <mail@kchr.de> [jeremymc@redhat.com: removed Kconfig, defconfig, move from Huawei to qcom dir] Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com> Tested-by: Michael Scott <michael.scott@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8994-pins.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/msm8994-pins.dtsi38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8994-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8994-pins.dtsi
new file mode 100644
index 000000000000..0e4eea0df25d
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8994-pins.dtsi
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&msmgpio {
+ blsp1_uart2_default: blsp1_uart2_default {
+ pinmux {
+ function = "blsp_uart2";
+ pins = "gpio4", "gpio5";
+ };
+ pinconf {
+ pins = "gpio4", "gpio5";
+ drive-strength = <16>;
+ bias-disable;
+ };
+ };
+
+ blsp1_uart2_sleep: blsp1_uart2_sleep {
+ pinmux {
+ function = "gpio";
+ pins = "gpio4", "gpio5";
+ };
+ pinconf {
+ pins = "gpio4", "gpio5";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
+};