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| author | Daniel Thompson <daniel.thompson@linaro.org> | 2017-09-19 21:32:04 +0300 |
|---|---|---|
| committer | Sudeep Holla <sudeep.holla@arm.com> | 2017-10-03 17:10:17 +0300 |
| commit | bc3d3447b66a9eb398c7cce96f05b7c78d725abc (patch) | |
| tree | ac39d2efa83f71f509cabd0a7297a0270563f02b /arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts | |
| parent | 2bd6bf03f4c1c59381d62c61d03f6cc3fe71f66e (diff) | |
| download | linux-bc3d3447b66a9eb398c7cce96f05b7c78d725abc.tar.xz | |
arm64: dts: foundation-v8: Enable PSCI mode
Currently if the Foundation model is running ARM Trusted Firmware then
the kernel, which is configured to use spin tables, cannot start secondary
processors or "power off" the simulation.
After adding a couple of labels to the include file and splitting out the
spin-table configuration into a header, we add a couple of new headers
together with two new DTs (GICv2 + PSCI and GICv3 + PSCI).
The new GICv3+PSCI DT has been boot tested, the remaining three (two of
which existed prior to this patch) have been "tested" by decompiling the
blobs and comparing them against a reference.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Diffstat (limited to 'arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts')
| -rw-r--r-- | arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts | 25 |
1 files changed, 2 insertions, 23 deletions
diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts index 35588dfa095c..c5d834d7d0ba 100644 --- a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts @@ -5,26 +5,5 @@ */ #include "foundation-v8.dtsi" - -/ { - gic: interrupt-controller@2f000000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <3>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - interrupt-controller; - reg = <0x0 0x2f000000 0x0 0x10000>, - <0x0 0x2f100000 0x0 0x200000>, - <0x0 0x2c000000 0x0 0x2000>, - <0x0 0x2c010000 0x0 0x2000>, - <0x0 0x2c02f000 0x0 0x2000>; - interrupts = <1 9 4>; - - its: its@2f020000 { - compatible = "arm,gic-v3-its"; - msi-controller; - reg = <0x0 0x2f020000 0x0 0x20000>; - }; - }; -}; +#include "foundation-v8-gicv3.dtsi" +#include "foundation-v8-spin-table.dtsi" |