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author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-10-16 10:22:22 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-10-16 10:22:22 +0300 |
commit | 58f2c391cc0560231d7636c39d31b1b26c9396b7 (patch) | |
tree | 67956eea736a8763f67be8a52bcaf0d3fe4374f4 /arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | |
parent | c2e5df616e1ae6c2a074cb241ebb65a318ebaf7c (diff) | |
parent | 33d930e59a98fa10a0db9f56c7fa2f21a4aef9b9 (diff) | |
download | linux-58f2c391cc0560231d7636c39d31b1b26c9396b7.tar.xz |
Merge 4.14-rc5 into char-misc-next
We need the fixes in here to resolve merge issues and for testing.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 39 |
1 files changed, 36 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 52f1687e7a09..af834cdbba79 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -392,6 +392,17 @@ }; }; + emmc_clk_gate_pins: emmc_clk_gate { + mux { + groups = "BOOT_8"; + function = "gpio_periphs"; + }; + cfg-pull-down { + pins = "BOOT_8"; + bias-pull-down; + }; + }; + nor_pins: nor { mux { groups = "nor_d", @@ -430,6 +441,17 @@ }; }; + sdcard_clk_gate_pins: sdcard_clk_gate { + mux { + groups = "CARD_2"; + function = "gpio_periphs"; + }; + cfg-pull-down { + pins = "CARD_2"; + bias-pull-down; + }; + }; + sdio_pins: sdio { mux { groups = "sdio_d0", @@ -442,6 +464,17 @@ }; }; + sdio_clk_gate_pins: sdio_clk_gate { + mux { + groups = "GPIOX_4"; + function = "gpio_periphs"; + }; + cfg-pull-down { + pins = "GPIOX_4"; + bias-pull-down; + }; + }; + sdio_irq_pins: sdio_irq { mux { groups = "sdio_irq"; @@ -661,21 +694,21 @@ &sd_emmc_a { clocks = <&clkc CLKID_SD_EMMC_A>, - <&xtal>, + <&clkc CLKID_SD_EMMC_A_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; &sd_emmc_b { clocks = <&clkc CLKID_SD_EMMC_B>, - <&xtal>, + <&clkc CLKID_SD_EMMC_B_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; &sd_emmc_c { clocks = <&clkc CLKID_SD_EMMC_C>, - <&xtal>, + <&clkc CLKID_SD_EMMC_C_CLK0>, <&clkc CLKID_FCLK_DIV2>; clock-names = "core", "clkin0", "clkin1"; }; |