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authorJiri Kosina <jkosina@suse.cz>2010-05-03 17:25:35 +0400
committerJiri Kosina <jkosina@suse.cz>2010-05-03 17:25:35 +0400
commitd6d53cbc6b10d28646fb6184d1069f336ec76dc4 (patch)
tree1c844b3ce8bd430becbbb74875898b08d9f89bb5 /arch/arm/mm/Kconfig
parent0b5adf92ec793c665b0de63ac146d190a921c391 (diff)
parent6a740aa4f47b9f29bad5292cf51f008f3edad9b1 (diff)
downloadlinux-d6d53cbc6b10d28646fb6184d1069f336ec76dc4.tar.xz
Merge branch 'hid-suspend' into picolcd
Diffstat (limited to 'arch/arm/mm/Kconfig')
-rw-r--r--arch/arm/mm/Kconfig13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index c4ed9f93f646..5bd7c89a6045 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -736,6 +736,12 @@ config NEEDS_SYSCALL_FOR_CMPXCHG
config OUTER_CACHE
bool
+config OUTER_CACHE_SYNC
+ bool
+ help
+ The outer cache has a outer_cache_fns.sync function pointer
+ that can be used to drain the write buffer of the outer cache.
+
config CACHE_FEROCEON_L2
bool "Enable the Feroceon L2 cache controller"
depends on ARCH_KIRKWOOD || ARCH_MV78XX0
@@ -757,6 +763,7 @@ config CACHE_L2X0
REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || ARCH_NOMADIK || ARCH_OMAP4
default y
select OUTER_CACHE
+ select OUTER_CACHE_SYNC
help
This option enables the L2x0 PrimeCell.
@@ -781,3 +788,9 @@ config ARM_L1_CACHE_SHIFT
int
default 6 if ARM_L1_CACHE_SHIFT_6
default 5
+
+config ARCH_HAS_BARRIERS
+ bool
+ help
+ This option allows the use of custom mandatory barriers
+ included via the mach/barriers.h file.