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author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-10 08:00:07 +0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-10 08:00:07 +0400 |
commit | dcded10f6dce10411b16134ce9cc87bfdf75c13f (patch) | |
tree | da6d0face147072c9eadc8a01af4e49958769138 /arch/arm/mach-ux500/ste-dma40-db8500.h | |
parent | 9e0ba741aabdf129d561e62d207c75146adef5e8 (diff) | |
parent | b0ebeb9c09cb5b84bb2f33927c84c7648845fcec (diff) | |
download | linux-dcded10f6dce10411b16134ce9cc87bfdf75c13f.tar.xz |
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (30 commits)
DMAENGINE: at_hdmac: locking fixlet
DMAENGINE: pch_dma: kill another usage of __raw_{read|write}l
dma: dmatest: fix potential sign bug
ioat2: catch and recover from broken vtd configurations v6
DMAENGINE: add runtime slave control to COH 901 318 v3
DMAENGINE: add runtime slave config to DMA40 v3
DMAENGINE: generic slave channel control v3
dmaengine: Driver for Topcliff PCH DMA controller
intel_mid: Add Mrst & Mfld DMA Drivers
drivers/dma: Eliminate a NULL pointer dereference
dma/timb_dma: compile warning on 32 bit
DMAENGINE: ste_dma40: support older silicon
DMAENGINE: ste_dma40: support disabling physical channels
DMAENGINE: ste_dma40: no disabled phy channels on ux500
DMAENGINE: ste_dma40: fix suspend bug
DMAENGINE: ste_dma40: add DB8500 memcpy channels
DMAENGINE: ste_dma40: no flow control on memcpy
DMAENGINE: ste_dma40: arch updates for LCLA and LCPA
DMAENGINE: ste_dma40: allocate LCLA dynamically
DMAENGINE: ste_dma40: no premature stop
...
Fix up trivial conflicts in arch/arm/mach-ux500/devices-db8500.c
Diffstat (limited to 'arch/arm/mach-ux500/ste-dma40-db8500.h')
-rw-r--r-- | arch/arm/mach-ux500/ste-dma40-db8500.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-ux500/ste-dma40-db8500.h b/arch/arm/mach-ux500/ste-dma40-db8500.h index e7016278dfa9..9d9d3797b3b0 100644 --- a/arch/arm/mach-ux500/ste-dma40-db8500.h +++ b/arch/arm/mach-ux500/ste-dma40-db8500.h @@ -136,7 +136,7 @@ enum dma_dest_dev_type { STEDMA40_DEV_CAC1_TX = 48, STEDMA40_DEV_CAC1_TX_HAC1_TX = 49, STEDMA40_DEV_HAC1_TX = 50, - STEDMA40_MEMXCPY_TX_0 = 51, + STEDMA40_MEMCPY_TX_0 = 51, STEDMA40_DEV_SLIM1_CH0_TX_HSI_TX_CH4 = 52, STEDMA40_DEV_SLIM1_CH1_TX_HSI_TX_CH5 = 53, STEDMA40_DEV_SLIM1_CH2_TX_HSI_TX_CH6 = 54, |