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authorMarc Zyngier <marc.zyngier@arm.com>2011-09-08 16:15:22 +0400
committerArnd Bergmann <arnd@arndb.de>2012-09-14 13:14:58 +0400
commit5ac21a943e4052ef6743b09b6a06fbb683a3519d (patch)
treee47d3289d14ebe936ecf720137f0a70b6258b7d7 /arch/arm/mach-ux500/platsmp.c
parent44ea349f5b7e0b4865de9ca6b4437c746eede40c (diff)
downloadlinux-5ac21a943e4052ef6743b09b6a06fbb683a3519d.tar.xz
ARM: SoC: convert ux500 to SMP operations
Convert ux500 platforms to use struct smp_operations to provide their SMP and CPU hotplug operations. Cc: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-ux500/platsmp.c')
-rw-r--r--arch/arm/mach-ux500/platsmp.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index da1d5ad5bd45..b6f4e0e787ec 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -58,7 +58,7 @@ static void __iomem *scu_base_addr(void)
static DEFINE_SPINLOCK(boot_lock);
-void __cpuinit platform_secondary_init(unsigned int cpu)
+static void __cpuinit ux500_secondary_init(unsigned int cpu)
{
/*
* if any interrupts are already enabled for the primary
@@ -80,7 +80,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock);
}
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int __cpuinit ux500_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
unsigned long timeout;
@@ -145,7 +145,7 @@ static void __init wakeup_secondary(void)
* Initialise the CPU possible map early - this describes the CPUs
* which may be present or become present in the system.
*/
-void __init smp_init_cpus(void)
+static void __init ux500_smp_init_cpus(void)
{
void __iomem *scu_base = scu_base_addr();
unsigned int i, ncores;
@@ -165,9 +165,19 @@ void __init smp_init_cpus(void)
set_smp_cross_call(gic_raise_softirq);
}
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init ux500_smp_prepare_cpus(unsigned int max_cpus)
{
scu_enable(scu_base_addr());
wakeup_secondary();
}
+
+struct smp_operations ux500_smp_ops __initdata = {
+ .smp_init_cpus = ux500_smp_init_cpus,
+ .smp_prepare_cpus = ux500_smp_prepare_cpus,
+ .smp_secondary_init = ux500_secondary_init,
+ .smp_boot_secondary = ux500_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+ .cpu_die = ux500_cpu_die,
+#endif
+};