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authorMagnus Damm <damm@opensource.se>2011-09-26 01:20:49 +0400
committerRafael J. Wysocki <rjw@sisk.pl>2011-09-26 01:20:49 +0400
commitcf33835c5fc528cacd4f98bc38f246022dad340d (patch)
tree4142c54bfcc9e95468d8d3e872583d306d6484e7 /arch/arm/mach-shmobile/include/mach/common.h
parent06b841666a5a47918d31472dd77837906f999a9a (diff)
downloadlinux-cf33835c5fc528cacd4f98bc38f246022dad340d.tar.xz
ARM: mach-shmobile: sh7372 A3SM support
This patch adds sh7372 A3SM power domain support. The sh7372 A3SM hardware power domain contains the ARM Cortex-A8 CPU Core including L2 cache. This sleep mode can be seen as a one step deeper sleep mode from the already existing Core Standby mode. To wake up from A3SM sleep only a few wakeup sources are supported - so the regular INTC controller will not be able to help us unfortunately. The code in this patch will enter A3SM sleep via the regular Suspend-to-RAM interface in the case of only wakeups supported by A3SM are enabled. If unsupported wakeups are enabled then Core Standby will be used instead. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Diffstat (limited to 'arch/arm/mach-shmobile/include/mach/common.h')
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 7b6f6f91da81..c0cdbf997c91 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -35,7 +35,8 @@ extern void sh7372_add_standard_devices(void);
extern void sh7372_clock_init(void);
extern void sh7372_pinmux_init(void);
extern void sh7372_pm_init(void);
-extern void sh7372_resume_core_standby(void);
+extern void sh7372_resume_core_standby_a3sm(void);
+extern int sh7372_do_idle_a3sm(unsigned long unused);
extern struct clk sh7372_extal1_clk;
extern struct clk sh7372_extal2_clk;