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authorArnd Bergmann <arnd@arndb.de>2012-11-13 01:12:35 +0400
committerArnd Bergmann <arnd@arndb.de>2012-11-13 01:12:35 +0400
commitf29246524284a78457f0fbf74a5b50327d4f3aca (patch)
tree999cf735f9b24f7d12f47b9de97c1ddade8b3e5e /arch/arm/mach-shmobile/clock-sh7372.c
parent889cf721d7f9249542315599032accffea3b9288 (diff)
parentd5b689089d7db3851c4d5d6b3727d22ef44d2023 (diff)
downloadlinux-f29246524284a78457f0fbf74a5b50327d4f3aca.tar.xz
Merge branch 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc2
From Simon Horman <horms@verge.net.au>: * This pull-request is based on the boards branch of the rensas tree which I have sent a pull-request for. The boards branch is in turn based on the soc branch. The reason for the soc2 -> boards -> soc branch progression is to satisfy dependencies of patches in the boards and soc branches. * 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: sh7372: sh7372_fsiXck_clk become non-global ARM: shmobile: sh7372: remove fsidivx clock Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-sh7372.c')
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 4d57e342537b..3ca6757b129a 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -295,10 +295,10 @@ struct clk sh7372_pllc2_clk = {
};
/* External input clock (pin name: FSIACK/FSIBCK ) */
-struct clk sh7372_fsiack_clk = {
+static struct clk fsiack_clk = {
};
-struct clk sh7372_fsibck_clk = {
+static struct clk fsibck_clk = {
};
static struct clk *main_clks[] = {
@@ -314,8 +314,8 @@ static struct clk *main_clks[] = {
&pllc1_clk,
&pllc1_div2_clk,
&sh7372_pllc2_clk,
- &sh7372_fsiack_clk,
- &sh7372_fsibck_clk,
+ &fsiack_clk,
+ &fsibck_clk,
};
static void div4_kick(struct clk *clk)
@@ -399,14 +399,14 @@ static struct clk *hdmi_parent[] = {
static struct clk *fsiackcr_parent[] = {
[0] = &pllc1_div2_clk,
[1] = &sh7372_pllc2_clk,
- [2] = &sh7372_fsiack_clk, /* external input for FSI A */
+ [2] = &fsiack_clk, /* external input for FSI A */
[3] = NULL, /* setting prohibited */
};
static struct clk *fsibckcr_parent[] = {
[0] = &pllc1_div2_clk,
[1] = &sh7372_pllc2_clk,
- [2] = &sh7372_fsibck_clk, /* external input for FSI B */
+ [2] = &fsibck_clk, /* external input for FSI B */
[3] = NULL, /* setting prohibited */
};
@@ -507,8 +507,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
CLKDEV_CON_ID("pllc2_clk", &sh7372_pllc2_clk),
- CLKDEV_CON_ID("fsidiva", &fsidivs[FSIDIV_A]),
- CLKDEV_CON_ID("fsidivb", &fsidivs[FSIDIV_B]),
+ CLKDEV_CON_ID("fsiack", &fsiack_clk),
+ CLKDEV_CON_ID("fsibck", &fsibck_clk),
/* DIV4 clocks */
CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
@@ -606,8 +606,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("spu2", "sh_fsi2", &mstp_clks[MSTP223]),
CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]),
CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]),
- CLKDEV_ICK_ID("xcka", "sh_fsi2", &sh7372_fsiack_clk),
- CLKDEV_ICK_ID("xckb", "sh_fsi2", &sh7372_fsibck_clk),
+ CLKDEV_ICK_ID("xcka", "sh_fsi2", &fsiack_clk),
+ CLKDEV_ICK_ID("xckb", "sh_fsi2", &fsibck_clk),
};
void __init sh7372_clock_init(void)