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authorLinus Torvalds <torvalds@linux-foundation.org>2020-10-24 20:33:08 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2020-10-24 20:33:08 +0300
commite731f3146ff3bba5424b40140e1a7e6f92e94964 (patch)
treec926040385de8b020763f0d2338e0ccbf42bac45 /arch/arm/mach-s3c/include/mach/io-s3c24xx.h
parent1f70935f637dfba226bf77182c2629fde61ed06e (diff)
parentaccdab6d9e8f715068d91ee0ca0424a6999f0d19 (diff)
downloadlinux-e731f3146ff3bba5424b40140e1a7e6f92e94964.tar.xz
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC platform updates from Olof Johansson: "SoC changes, a substantial part of this is cleanup of some of the older platforms that used to have a bunch of board files. In particular: - Remove non-DT i.MX platforms that haven't seen activity in years, it's time to remove them. - A bunch of cleanup and removal of platform data for TI/OMAP platforms, moving over to genpd for power/reset control (yay!) - Major cleanup of Samsung S3C24xx and S3C64xx platforms, moving them closer to multiplatform support (not quite there yet, but getting close). There are a few other changes too, smaller fixlets, etc. For new platform support, the primary ones are: - New SoC: Hisilicon SD5203, ARM926EJ-S platform. - Cpufreq support for i.MX7ULP" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (121 commits) ARM: mstar: Select MStar intc ARM: stm32: Replace HTTP links with HTTPS ones ARM: debug: add UART early console support for SD5203 ARM: hisi: add support for SD5203 SoC ARM: omap3: enable off mode automatically clk: imx: imx35: Remove mx35_clocks_init() clk: imx: imx31: Remove mx31_clocks_init() clk: imx: imx27: Remove mx27_clocks_init() ARM: imx: Remove unused definitions ARM: imx35: Retrieve the IIM base address from devicetree ARM: imx3: Retrieve the AVIC base address from devicetree ARM: imx3: Retrieve the CCM base address from devicetree ARM: imx31: Retrieve the IIM base address from devicetree ARM: imx27: Retrieve the CCM base address from devicetree ARM: imx27: Retrieve the SYSCTRL base address from devicetree ARM: s3c64xx: bring back notes from removed debug-macro.S ARM: s3c24xx: fix Wunused-variable warning on !MMU ARM: samsung: fix PM debug build with DEBUG_LL but !MMU MAINTAINERS: mark linux-samsung-soc list non-moderated ARM: imx: Remove remnant board file support pieces ...
Diffstat (limited to 'arch/arm/mach-s3c/include/mach/io-s3c24xx.h')
-rw-r--r--arch/arm/mach-s3c/include/mach/io-s3c24xx.h50
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c/include/mach/io-s3c24xx.h b/arch/arm/mach-s3c/include/mach/io-s3c24xx.h
new file mode 100644
index 000000000000..738b775d3336
--- /dev/null
+++ b/arch/arm/mach-s3c/include/mach/io-s3c24xx.h
@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * arch/arm/mach-s3c2410/include/mach/io.h
+ * from arch/arm/mach-rpc/include/mach/io.h
+ *
+ * Copyright (C) 1997 Russell King
+ * (C) 2003 Simtec Electronics
+*/
+
+#ifndef __ASM_ARM_ARCH_IO_S3C24XX_H
+#define __ASM_ARM_ARCH_IO_S3C24XX_H
+
+#include <mach/map-base.h>
+
+/*
+ * ISA style IO, for each machine to sort out mappings for,
+ * if it implements it. We reserve two 16M regions for ISA,
+ * so the PC/104 can use separate addresses for 8-bit and
+ * 16-bit port I/O.
+ */
+#define PCIO_BASE S3C_ADDR(0x02000000)
+#define IO_SPACE_LIMIT 0x00ffffff
+#define S3C24XX_VA_ISA_WORD (PCIO_BASE)
+#define S3C24XX_VA_ISA_BYTE (PCIO_BASE + 0x01000000)
+
+#ifdef CONFIG_ISA
+
+#define inb(p) readb(S3C24XX_VA_ISA_BYTE + (p))
+#define inw(p) readw(S3C24XX_VA_ISA_WORD + (p))
+#define inl(p) readl(S3C24XX_VA_ISA_WORD + (p))
+
+#define outb(v,p) writeb((v), S3C24XX_VA_ISA_BYTE + (p))
+#define outw(v,p) writew((v), S3C24XX_VA_ISA_WORD + (p))
+#define outl(v,p) writel((v), S3C24XX_VA_ISA_WORD + (p))
+
+#define insb(p,d,l) readsb(S3C24XX_VA_ISA_BYTE + (p),d,l)
+#define insw(p,d,l) readsw(S3C24XX_VA_ISA_WORD + (p),d,l)
+#define insl(p,d,l) readsl(S3C24XX_VA_ISA_WORD + (p),d,l)
+
+#define outsb(p,d,l) writesb(S3C24XX_VA_ISA_BYTE + (p),d,l)
+#define outsw(p,d,l) writesw(S3C24XX_VA_ISA_WORD + (p),d,l)
+#define outsl(p,d,l) writesl(S3C24XX_VA_ISA_WORD + (p),d,l)
+
+#else
+
+#define __io(x) (PCIO_BASE + (x))
+
+#endif
+
+#endif