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| author | Kevin Hilman <khilman@ti.com> | 2012-05-12 03:00:24 +0400 |
|---|---|---|
| committer | Kevin Hilman <khilman@ti.com> | 2012-06-25 22:22:48 +0400 |
| commit | e055548953355b6e69c56f9e54388845b29b4e97 (patch) | |
| tree | d9694b593408193e83574a1e49cb0c4908578182 /arch/arm/mach-omap2/omap-mpuss-lowpower.c | |
| parent | 9a17d88e0586bb7189655f8f99484a872a474626 (diff) | |
| download | linux-e055548953355b6e69c56f9e54388845b29b4e97.tar.xz | |
ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm
Iteration over all power domains in the idle path is unnecessary since
only power domains that are transitioning need to be accounted for.
Also PRCM register accesses are known to be expensive, so the
additional latency added to the idle path is signficiant.
In order allow the pre/post transitions to be isolated and called
per-pwrdm, change the API so passing in a specific power domain will
trigger the pre/post transtion accounting for only that specific power
domain. Passing NULL means iterating over all power domains as is
current behavior.
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap-mpuss-lowpower.c')
| -rw-r--r-- | arch/arm/mach-omap2/omap-mpuss-lowpower.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c index 13670aa84e58..e35a86bf4e1d 100644 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c @@ -255,7 +255,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) return -ENXIO; } - pwrdm_pre_transition(); + pwrdm_pre_transition(NULL); /* * Check MPUSS next state and save interrupt controller if needed. @@ -287,7 +287,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) wakeup_cpu = smp_processor_id(); set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON); - pwrdm_post_transition(); + pwrdm_post_transition(NULL); return 0; } |