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author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2014-04-14 17:54:02 +0400 |
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committer | Jason Cooper <jason@lakedaemon.net> | 2014-05-08 18:42:00 +0400 |
commit | d7df84b3cecad4c768e4065d1d61b2f8fd02b7fa (patch) | |
tree | 64b55219237723b95291719c0fbe9a3f42efe9cf /arch/arm/mach-mvebu/armada-370-xp.h | |
parent | ef37d337e1d37bd84ccaa5811a8d1f00f8b3677c (diff) | |
download | linux-d7df84b3cecad4c768e4065d1d61b2f8fd02b7fa.tar.xz |
irqchip: irq-armada-370-xp: Use cpu notifier to initialize secondary CPUs
Some irqchip initialization must be done on secondary CPUs. On mvebu
platforms, this is currently achieved by having the
arch/arm/mach-mvebu/platsmp.c code directly call into a function
exported by the irqchip driver, which isn't really nice.
This commit changes this by using the same solution as the one used in
the GIC driver: the irqchip driver registers a CPU notifier, which is
used to do the secondary CPU IRQ initialization. This way, the irqchip
driver is completely autonomous, and the function no longer needs to
be exposed from the irqchip driver to the SoC code.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483648-26611-6-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mach-mvebu/armada-370-xp.h')
-rw-r--r-- | arch/arm/mach-mvebu/armada-370-xp.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/mach-mvebu/armada-370-xp.h b/arch/arm/mach-mvebu/armada-370-xp.h index cd57c78af271..c3465f5b1250 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.h +++ b/arch/arm/mach-mvebu/armada-370-xp.h @@ -20,7 +20,6 @@ #define ARMADA_XP_MAX_CPUS 4 -void armada_xp_mpic_smp_cpu_init(void); void armada_xp_secondary_startup(void); extern struct smp_operations armada_xp_smp_ops; #endif |