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| author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2014-11-21 19:00:08 +0300 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2014-11-30 19:40:14 +0300 |
| commit | 27432825ae19fc26f099156c666cbcc4861e3e54 (patch) | |
| tree | 197ba77a3e623efec8c9b1bfd9696d7b98fddbb5 /arch/arm/mach-mvebu/Makefile | |
| parent | 8da2b2f7ceeed931af0fc1d4fca800650bb41826 (diff) | |
| download | linux-27432825ae19fc26f099156c666cbcc4861e3e54.tar.xz | |
ARM: mvebu: Armada XP GP specific suspend/resume code
On the Armada XP GP platform, entering suspend to RAM state is
triggering by talking to an external PIC micro-controller connected to
the SoC using 3 GPIOs. There is then a small magic sequence of GPIO
toggling that needs to be used to tell the PIC to turn off the SoC.
The code uses the Device Tree to find out which GPIOs are used to
connect to the PIC micro-controller, and then registers its
mvebu_armada_xp_gp_pm_enter() callback to the SoC-level PM code. The
SoC PM code will call back into this registered function at the very
end of the suspend procedure.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1416585613-2113-12-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mach-mvebu/Makefile')
| -rw-r--r-- | arch/arm/mach-mvebu/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile index e2bd96f619bc..b4f01497ce0b 100644 --- a/arch/arm/mach-mvebu/Makefile +++ b/arch/arm/mach-mvebu/Makefile @@ -7,7 +7,7 @@ CFLAGS_pmsu.o := -march=armv7-a obj-$(CONFIG_MACH_MVEBU_ANY) += system-controller.o mvebu-soc-id.o ifeq ($(CONFIG_MACH_MVEBU_V7),y) -obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o pmsu_ll.o pm.o +obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o pmsu_ll.o pm.o pm-board.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o platsmp-a9.o headsmp-a9.o endif |