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| author | Arnd Bergmann <arnd@arndb.de> | 2015-12-03 00:27:06 +0300 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2015-12-07 20:17:34 +0300 |
| commit | 4c811b99b4de975f6c624efb269ed719e75a3035 (patch) | |
| tree | 172a2831dcddac2dae733aa9c837ad44f4e2bf9b /arch/arm/mach-mv78xx0/bridge-regs.h | |
| parent | 5cdbe5d23a8a0d7274d628bb9d5ff018d25075ca (diff) | |
| download | linux-4c811b99b4de975f6c624efb269ed719e75a3035.tar.xz | |
ARM: mv78xx0: clean up mach/*.h headers
This is a simple move of all header files that are no longer
included by anything else from the include/mach directory
to the platform directory itself as preparation for
multiplatform support.
The mach/uncompress.h headers are left in place for now,
and are mildly modified to be independent of the other
headers. They will be removed entirely when ARCH_MULTIPLATFORM
gets enabled and they become obsolete.
Rather than updating the path names inside of the comments
of each header, I delete those comments to avoid having to
update them again, should they get moved or copied another
time.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm/mach-mv78xx0/bridge-regs.h')
| -rw-r--r-- | arch/arm/mach-mv78xx0/bridge-regs.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/mach-mv78xx0/bridge-regs.h b/arch/arm/mach-mv78xx0/bridge-regs.h new file mode 100644 index 000000000000..2f54e1753d45 --- /dev/null +++ b/arch/arm/mach-mv78xx0/bridge-regs.h @@ -0,0 +1,35 @@ +/* + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_BRIDGE_REGS_H +#define __ASM_ARCH_BRIDGE_REGS_H + +#include "mv78xx0.h" + +#define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104) +#define L2_WRITETHROUGH 0x00020000 + +#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108) +#define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108) +#define SOFT_RESET_OUT_EN 0x00000004 + +#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c) +#define SOFT_RESET 0x00000001 + +#define BRIDGE_INT_TIMER1_CLR (~0x0004) + +#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) +#define IRQ_CAUSE_ERR_OFF 0x0000 +#define IRQ_CAUSE_LOW_OFF 0x0004 +#define IRQ_CAUSE_HIGH_OFF 0x0008 +#define IRQ_MASK_ERR_OFF 0x000c +#define IRQ_MASK_LOW_OFF 0x0010 +#define IRQ_MASK_HIGH_OFF 0x0014 + +#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300) +#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE + 0x0300) + +#endif |