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authorDaniel Thompson <daniel.thompson@linaro.org>2015-01-09 20:33:36 +0300
committerRussell King <rmk+kernel@arm.linux.org.uk>2015-01-21 18:49:38 +0300
commitabbfb21efcd704e8b858e94e327bb014386ba0dd (patch)
treeb05a2fb88bae1bf0c8563c20172c39891adc9d72 /arch/arm/include/debug/ks8695.S
parent6f5194553c84c3eb412c0cc59554b85be128f43d (diff)
downloadlinux-abbfb21efcd704e8b858e94e327bb014386ba0dd.tar.xz
ARM: 8270/1: ks8695: Migrate debug_ll macros to shared directory
As part of the migration a couple of uart definitions have been copied from of the platform specific header files. Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Arnd Bergmann <arnd.bergmann@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/debug/ks8695.S')
-rw-r--r--arch/arm/include/debug/ks8695.S40
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/include/debug/ks8695.S b/arch/arm/include/debug/ks8695.S
new file mode 100644
index 000000000000..961da1f32ab3
--- /dev/null
+++ b/arch/arm/include/debug/ks8695.S
@@ -0,0 +1,40 @@
+/*
+ * arch/arm/include/debug/ks8695.S
+ *
+ * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
+ * Copyright (C) 2006 Simtec Electronics
+ *
+ * KS8695 - Debug macros
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define KS8695_UART_PA 0x03ffe000
+#define KS8695_UART_VA 0xf00fe000
+#define KS8695_URTH (0x04)
+#define KS8695_URLS (0x14)
+#define URLS_URTE (1 << 6)
+#define URLS_URTHRE (1 << 5)
+
+ .macro addruart, rp, rv, tmp
+ ldr \rp, =KS8695_UART_PA @ physical base address
+ ldr \rv, =KS8695_UART_VA @ virtual base address
+ .endm
+
+ .macro senduart, rd, rx
+ str \rd, [\rx, #KS8695_URTH] @ Write to Transmit Holding Register
+ .endm
+
+ .macro busyuart, rd, rx
+1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
+ tst \rd, #URLS_URTE @ Holding & Shift registers empty?
+ beq 1001b
+ .endm
+
+ .macro waituart, rd, rx
+1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
+ tst \rd, #URLS_URTHRE @ Holding Register empty?
+ beq 1001b
+ .endm