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authorMaxime Ripard <maxime.ripard@free-electrons.com>2016-09-23 14:28:10 +0300
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-12-26 10:27:11 +0300
commit1edcd36fcb48fe841bcc62eda36c105037d9583c (patch)
treec67dbb1620c841cac42bf4e347284ca69ee5efb6 /arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
parent119c366aeae35e2322d3e31a7ac0d23679252777 (diff)
downloadlinux-1edcd36fcb48fe841bcc62eda36c105037d9583c.tar.xz
ARM: sunxi: Convert pinctrl nodes to generic bindings
Now that we can handle the generic pinctrl bindings, convert our DT to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/sun9i-a80-cubieboard4.dts')
-rw-r--r--arch/arm/boot/dts/sun9i-a80-cubieboard4.dts18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
index 5ae52cb3d164..9112a200fd5e 100644
--- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
+++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
@@ -108,7 +108,7 @@
};
&mmc1_pins {
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ bias-pull-up;
};
&mmc2 {
@@ -123,7 +123,7 @@
&mmc2_8bit_pins {
/* Increase drive strength for DDR modes */
- allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+ drive-strength = <40>;
};
&osc32k {
@@ -133,14 +133,14 @@
&pio {
led_pins_cubieboard4: led-pins@0 {
- allwinner,pins = "PH6", "PH17";
- allwinner,function = "gpio_out";
+ pins = "PH6", "PH17";
+ function = "gpio_out";
};
mmc0_cd_pin_cubieboard4: mmc0_cd_pin@0 {
- allwinner,pins = "PH18";
- allwinner,function = "gpio_in";
- allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
+ pins = "PH18";
+ function = "gpio_in";
+ bias-pull-up;
};
};
@@ -150,8 +150,8 @@
&r_pio {
wifi_en_pin_cubieboard4: wifi_en_pin@0 {
- allwinner,pins = "PL2";
- allwinner,function = "gpio_out";
+ pins = "PL2";
+ function = "gpio_out";
};
};