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| author | Alexandre Torgue <alexandre.torgue@st.com> | 2018-05-03 16:28:28 +0300 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@st.com> | 2018-05-04 10:45:50 +0300 |
| commit | 2ff04d0f537fcb8ff033b4ae97e5e0751e21de5e (patch) | |
| tree | 32d839bd9599f981fbb75f5442c090538fac47e5 /arch/arm/boot/dts/stm32mp157c.dtsi | |
| parent | 20ab2d884681179895dd49b90bea0d881bd3c412 (diff) | |
| download | linux-2ff04d0f537fcb8ff033b4ae97e5e0751e21de5e.tar.xz | |
ARM: dts: stm32: Fix IRQ_TYPE_NONE warnings on stm32mp157c
Since commit 83a86fbb5b56 ("irqchip/gic: Loudly complain about
the use of IRQ_TYPE_NONE"), a warning is raised if IRQ_TYPE_NONE is used.
So we use IRQ_TYPE_LEVEL_HIGH for usart nodes instead of IRQ_TYPE_NONE.
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Tested-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32mp157c.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stm32mp157c.dtsi | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index 203fa972895f..b66f673b5038 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -314,7 +314,7 @@ usart2: serial@4000e000 { compatible = "st,stm32h7-uart"; reg = <0x4000e000 0x400>; - interrupts = <GIC_SPI 38 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc USART2_K>; status = "disabled"; }; @@ -322,7 +322,7 @@ usart3: serial@4000f000 { compatible = "st,stm32h7-uart"; reg = <0x4000f000 0x400>; - interrupts = <GIC_SPI 39 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc USART3_K>; status = "disabled"; }; @@ -330,7 +330,7 @@ uart4: serial@40010000 { compatible = "st,stm32h7-uart"; reg = <0x40010000 0x400>; - interrupts = <GIC_SPI 52 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART4_K>; status = "disabled"; }; @@ -338,7 +338,7 @@ uart5: serial@40011000 { compatible = "st,stm32h7-uart"; reg = <0x40011000 0x400>; - interrupts = <GIC_SPI 53 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART5_K>; status = "disabled"; }; @@ -431,7 +431,7 @@ uart7: serial@40018000 { compatible = "st,stm32h7-uart"; reg = <0x40018000 0x400>; - interrupts = <GIC_SPI 82 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART7_K>; status = "disabled"; }; @@ -439,7 +439,7 @@ uart8: serial@40019000 { compatible = "st,stm32h7-uart"; reg = <0x40019000 0x400>; - interrupts = <GIC_SPI 83 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART8_K>; status = "disabled"; }; @@ -489,7 +489,7 @@ usart6: serial@44003000 { compatible = "st,stm32h7-uart"; reg = <0x44003000 0x400>; - interrupts = <GIC_SPI 71 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc USART6_K>; status = "disabled"; }; @@ -800,7 +800,7 @@ usart1: serial@5c000000 { compatible = "st,stm32h7-uart"; reg = <0x5c000000 0x400>; - interrupts = <GIC_SPI 37 IRQ_TYPE_NONE>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc USART1_K>; status = "disabled"; }; |