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authorHeiko Stuebner <heiko@sntech.de>2015-10-12 15:48:30 +0300
committerUlf Hansson <ulf.hansson@linaro.org>2015-10-26 18:00:13 +0300
commitc41d31f71d8889919d2f3becbccd6d2d7a3bd243 (patch)
tree90f368dcf0d2aa8befc6e5cd1c6c666e6144a97d /arch/arm/boot/dts/rk3288-veyron.dtsi
parentf71ddc5873cb90ffb217de50aed8bdd2fb00fc9f (diff)
downloadlinux-c41d31f71d8889919d2f3becbccd6d2d7a3bd243.tar.xz
ARM: dts: rockchip: add tuning related settings to veyron devices
This allows the tuning code to run and use higher speeds on capable cards. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/rk3288-veyron.dtsi')
-rw-r--r--arch/arm/boot/dts/rk3288-veyron.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 275c78ccc0f3..860cea0a7613 100644
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -149,7 +149,9 @@
broken-cd;
bus-width = <8>;
cap-mmc-highspeed;
+ rockchip,default-sample-phase = <158>;
disable-wp;
+ mmc-hs200-1_8v;
mmc-pwrseq = <&emmc_pwrseq>;
non-removable;
num-slots = <1>;
@@ -355,6 +357,10 @@
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
vmmc-supply = <&vcc33_sys>;
vqmmc-supply = <&vcc18_wl>;
};