diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2019-07-13 12:52:29 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-07-26 14:42:57 +0300 |
| commit | 47ef78b09952eb8498457753f4ba351a8366b80f (patch) | |
| tree | 286045e7139c9576bb14dc8b4c3c4bcbf2a4bf4c /arch/arm/boot/dts/gemini-sl93512r.dts | |
| parent | 5f9e832c137075045d15cd6899ab0505cfb2ca4b (diff) | |
| download | linux-47ef78b09952eb8498457753f4ba351a8366b80f.tar.xz | |
ARM: dts: gemini: Fix up confused pin settings
The SL93512r board has its pin muxing set up for the wrong
ASIC: SL3516 instead of SL3512 that it is using. Fix it
up and reference the right GPIO for the WPS button.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/gemini-sl93512r.dts')
| -rw-r--r-- | arch/arm/boot/dts/gemini-sl93512r.dts | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/gemini-sl93512r.dts b/arch/arm/boot/dts/gemini-sl93512r.dts index 2bb953440793..afe655593b28 100644 --- a/arch/arm/boot/dts/gemini-sl93512r.dts +++ b/arch/arm/boot/dts/gemini-sl93512r.dts @@ -36,8 +36,8 @@ wakeup-source; linux,code = <KEY_WPS_BUTTON>; label = "WPS"; - /* Conflict with NAND flash */ - gpios = <&gpio0 17 GPIO_ACTIVE_LOW>; + /* Conflicts with TVC and extended flash */ + gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; }; button-setup { @@ -180,17 +180,20 @@ syscon: syscon@40000000 { pinctrl { /* - * gpio0egrp cover line 16 used by HD LED - * gpio0fgrp cover line 17, 18 used by wireless LED and reset button - * gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY - * gpio0kgrp cover line 31 used by USB LED + * gpio0agrp cover line 0, used by WPS button + * gpio0fgrp cover line 16 used by HD LED + * gpio0ggrp cover line 17, 18 used by wireless LAN LED and + * reset button OR USB ID select on 17 and USB VBUS select + * on 18. (Confusing.) + * gpio0igrp cover line 21, 22 used by MDIO for Marvell PHY */ gpio0_default_pins: pinctrl-gpio0 { mux { function = "gpio0"; - groups = "gpio0egrp", + groups = "gpio0agrp", "gpio0fgrp", - "gpio0hgrp"; + "gpio0ggrp", + "gpio0igrp"; }; }; /* |