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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2020-07-19 20:32:13 +0300
committerKevin Hilman <khilman@baylibre.com>2020-07-22 00:12:38 +0300
commit916a0edc43f03f86b13fbc9943e5dc936671ea6e (patch)
tree09a6ff73a1f45f62cb01b8489cbf601bb368802b /arch/arm/boot/dts/exynos5422-odroidxu3-lite.dts
parent8f16cfabbc0a6c52b114eca2ff8e95bb07949741 (diff)
downloadlinux-916a0edc43f03f86b13fbc9943e5dc936671ea6e.tar.xz
arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS
Add the OPP table for the Mali Bifrost GPU and drop the hardcoded initial clock configuration. This enables GPU DVFS and thus saves power when the GPU is not in use while still being able switch to a higher clock on demand. Set the GP0_PLL clock to 744MHz (which is the only frequency which cannot be derived from the FCLK dividers) as the clock driver avoids setting the parent clock rates so the HIFI PLL clock isn't changed (as that's reserved for audio). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20200719173213.639540-4-martin.blumenstingl@googlemail.com
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