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| author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2018-07-26 16:15:44 +0300 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2018-07-30 19:46:19 +0300 |
| commit | 386177da9e601ed176d54c04324d9ebf44c70620 (patch) | |
| tree | c0cb9047afe65e8c1b4fc5156eec188927eaff79 /arch/arc/plat-axs10x | |
| parent | eb2777397fd83a4a7eaa26984d09d3babb845d2a (diff) | |
| download | linux-386177da9e601ed176d54c04324d9ebf44c70620.tar.xz | |
ARC: add SMP_CACHE_BYTES value validate
Check that SMP_CACHE_BYTES (and hence ARCH_DMA_MINALIGN) is larger
or equal to any cache line length by comparing it with values
previously read from ARC cache BCR registers.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/plat-axs10x')
0 files changed, 0 insertions, 0 deletions