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| author | David S. Miller <davem@davemloft.net> | 2018-01-09 18:37:00 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-01-09 18:37:00 +0300 |
| commit | a0ce093180f2bbb832b3f5583adc640ad67ea568 (patch) | |
| tree | 62c9aca5be3566ea4810e4584a02870de8b953f8 /arch/arc/boot/dts/hsdk.dts | |
| parent | f4803f1b73f877a571be4c8e531dfcf190acc691 (diff) | |
| parent | ef7f8cec80a0ba7bd00ece46844c8994117dc910 (diff) | |
| download | linux-a0ce093180f2bbb832b3f5583adc640ad67ea568.tar.xz | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Diffstat (limited to 'arch/arc/boot/dts/hsdk.dts')
| -rw-r--r-- | arch/arc/boot/dts/hsdk.dts | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts/hsdk.dts index 8f627c200d60..006aa3de5348 100644 --- a/arch/arc/boot/dts/hsdk.dts +++ b/arch/arc/boot/dts/hsdk.dts @@ -114,6 +114,14 @@ reg = <0x00 0x10>, <0x14B8 0x4>; #clock-cells = <0>; clocks = <&input_clk>; + + /* + * Set initial core pll output frequency to 1GHz. + * It will be applied at the core pll driver probing + * on early boot. + */ + assigned-clocks = <&core_clk>; + assigned-clock-rates = <1000000000>; }; serial: serial@5000 { |