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author | Catalin Marinas <catalin.marinas@arm.com> | 2013-07-23 19:15:36 +0400 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-07-26 15:02:09 +0400 |
commit | bdae73cd374e28db544fdd9b77de689a36e3c129 (patch) | |
tree | aa22b6e3e1232f27fa50c24a2144daa65d61d7c6 /Documentation | |
parent | 1f49856bb029779d8f1b63517a3a3b34ffe672c7 (diff) | |
download | linux-bdae73cd374e28db544fdd9b77de689a36e3c129.tar.xz |
ARM: 7790/1: Fix deferred mm switch on VIVT processors
As of commit b9d4d42ad9 (ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on
pre-ARMv6 CPUs), the mm switching on VIVT processors is done in the
finish_arch_post_lock_switch() function to avoid whole cache flushing
with interrupts disabled. The need for deferred mm switch is stored as a
thread flag (TIF_SWITCH_MM). However, with preemption enabled, we can
have another thread switch before finish_arch_post_lock_switch(). If the
new thread has the same mm as the previous 'next' thread, the scheduler
will not call switch_mm() and the TIF_SWITCH_MM flag won't be set for
the new thread.
This patch moves the switch pending flag to the mm_context_t structure
since this is specific to the mm rather than thread.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Marc Kleine-Budde <mkl@pengutronix.de>
Tested-by: Marc Kleine-Budde <mkl@pengutronix.de>
Cc: <stable@vger.kernel.org> # 3.5+
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions