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authorSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>2018-06-27 18:31:22 +0300
committerJoerg Roedel <jroedel@suse.de>2018-07-06 15:43:47 +0300
commit90fcffd9cf5e7cc593169f529799f3e3c5437e75 (patch)
tree8cea3c13a5a83e5bf4667e05888ec7ac919f8556 /Documentation
parente881dbd5d4a6950c9e2e7623c79d9578949365c9 (diff)
downloadlinux-90fcffd9cf5e7cc593169f529799f3e3c5437e75.tar.xz
iommu/amd: Add support for IOMMU XT mode
The AMD IOMMU XT mode enables interrupt remapping with 32-bit destination APIC ID, which is required for x2APIC. The feature is available when the XTSup bit is set in the IOMMU Extended Feature register and/or the IVHD Type 10h IOMMU Feature Reporting field. For more information, please see section "IOMMU x2APIC Support" of the AMD I/O Virtualization Technology (IOMMU) Specification. Cc: Joerg Roedel <jroedel@suse.de> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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