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| author | Rob Herring <robh@kernel.org> | 2019-11-19 23:31:25 +0300 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2019-11-26 22:32:44 +0300 |
| commit | 30a3e01d4cbbfedac48d69a415136000a36910c7 (patch) | |
| tree | f550b2bd684d7f8674b4f0101e265e7207f90e65 /Documentation/devicetree | |
| parent | 2aacace6dbbb6b6ce4e177e6c7ea901f389c0472 (diff) | |
| download | linux-30a3e01d4cbbfedac48d69a415136000a36910c7.tar.xz | |
dt-bindings: arm: Remove leftover axentia.txt
The bindings described in axentia.txt are already covered by
atmel-at91.yaml, so remove the file.
Cc: Peter Rosin <peda@axentia.se>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/axentia.txt | 28 |
1 files changed, 0 insertions, 28 deletions
diff --git a/Documentation/devicetree/bindings/arm/axentia.txt b/Documentation/devicetree/bindings/arm/axentia.txt deleted file mode 100644 index de58f2463880..000000000000 --- a/Documentation/devicetree/bindings/arm/axentia.txt +++ /dev/null @@ -1,28 +0,0 @@ -Device tree bindings for Axentia ARM devices -============================================ - -Linea CPU module ----------------- - -Required root node properties: -compatible = "axentia,linea", - "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; -and following the rules from atmel-at91.txt for a sama5d31 SoC. - - -Nattis v2 board with Natte v2 power board ------------------------------------------ - -Required root node properties: -compatible = "axentia,nattis-2", "axentia,natte-2", "axentia,linea", - "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; -and following the rules from above for the axentia,linea CPU module. - - -TSE-850 v3 board ----------------- - -Required root node properties: -compatible = "axentia,tse850v3", "axentia,linea", - "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5"; -and following the rules from above for the axentia,linea CPU module. |